GOA Boost Capacitor Design for Narrow Bezel Displays

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional gate driver on array (GOA) circuits have a wide GOA region due to the large space occupied by the boost capacitor, making it difficult to design narrow-bezel products and increasing production costs.

Innovation Solution

A display panel design that includes a substrate with a thin-film transistor (TFT) device layer, a passivation layer, and a conductive film layer, where the conductive film layer forms capacitors with the TFT electrodes, increasing capacitance without expanding the GOA region's width by using a passivation layer and an indium tin oxide film layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If a conventional boost capacitor is added between the gate electrode and source electrode of the TFT to increase output capability, then the output capability of the GOA circuit is improved, but the GOA region width increases and occupies more space

Engineering Contradiction:
Improveoutput capabilityVSAvoidGOA region width
Core Design Contradiction:
PowerVSArea of stationary object

Solution Approach 1:

The patent transitions from a planar capacitor layout to a three-dimensional stacked structure by placing the conductive film layer above the passivation layer, which itself is above the TFT source/drain electrode. This vertical stacking enables the capacitor to utilize the Z-dimension (thickness direction) rather than requiring additional lateral space, thereby reducing the GOA region width while maintaining the necessary capacitance value for output capability enhancement

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent changes the physical parameters of the capacitor structure by using a thin passivation layer (1500-2500 Å thickness) and positioning the conductive film layer at a specific height above the source/drain electrode. This parameter optimization allows the capacitor to achieve the required capacitance value with a smaller overlapping area, thus reducing the lateral space occupation in the GOA region

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the capacitance value is increased to maintain adequate capacitance in a reduced GOA region, then the output capability is maintained, but the capacitor structure becomes more complex

Engineering Contradiction:
Improvecapacitance valueVSAvoidcapacitor structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The conductive film layer serves dual functions: it acts as the top electrode of the boost capacitor and simultaneously functions as the pixel electrode in the display structure. The passivation layer serves both as the dielectric for the capacitor and as a protective insulation layer for the TFT. This multi-functionality reduces the need for additional separate components, maintaining reliability while avoiding increased structural complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the capacitor structure with the existing TFT and pixel electrode structures. The conductive film layer that would traditionally be a separate pixel electrode is integrated to also serve as the capacitor's top electrode. This consolidation achieves the required capacitance value without adding separate capacitor components, thereby maintaining device simplicity while ensuring adequate capacitance for reliable operation

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The enhanced capacitance value allows for a reduced GOA region width, enabling the design of narrow-bezel products while maintaining adequate capacitance, thus reducing production costs.

Implementation Method 1

the conductive film layer at least partially overlaps a source/drain electrode of the TFT to form a first capacitor

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

the boost capacitor increases a potential of the gate electrode of the TFT T21 due to coupling

Methodology Applied
Scientific EffectElectrostatic coupling: Electrostatic Induction

Data Source

PatentUS11437414B2Display panel and display device
Publication Date: 2022.09.06 TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO LTD
  • US11437414B2 patent drawing
  • US11437414B2 patent drawing
  • US11437414B2 patent drawing

AI summary

The present invention provides a display panel and a display device. A conductive film layer of the display panel is electrically connected to a gate electrode of a thin film transistor (TFT) through a first via hole, and the conductive film layer at least partially overlaps a source/drain electrode of the TFT to form a first capacitor. A second capacitor is formed in an overlapping region between a source/drain electrode of the TFT and the gate electrode of the TFT. Accordingly, a boost capacitance value of the display panel is increased, and a driving circuit requires less space.