GPIO Output Driver Slope Control for Ringing and SSN Reduction

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Solution Overview

Problem

Conventional GPIO circuits face issues with significant ringing in output waveforms due to parasitic inductances and simultaneous switching noise (SSN), which can degrade device reliability and cause logic errors.

Innovation Solution

The proposed GPIO circuit includes output driver transistors with a pre-driver circuit that incorporates a slope control signal and a slow pre-driver (SPD) circuit. This configuration allows the output driver transistors to be turned on either in a normal mode or a slope-controlled mode, reducing overshoots and SSN by controlling the slope of the transient current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If the output driver transistors are turned on quickly to drive large capacitive loads, then the drive power is high, but significant ringing appears in the output waveform due to parasitic inductances

Engineering Contradiction:
Improvedrive powerVSAvoidoutput waveform quality
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The pre-driver transistor is dynamically controlled by a slope control signal to adjust its conductivity, thereby dynamically adjusting the slope of the transient current output by the GPIO circuit. This allows the system to adapt between fast switching (high power) and controlled switching (reduced ringing) based on operational requirements

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

By changing the conductivity parameter of the pre-driver transistor through slope control signal adjustment, the slope of the transient current is modified. This parameter change enables reduction of the transient current slope to minimize ringing effects caused by parasitic inductances while maintaining adequate drive capability

Inventive Principle:
Principle #35Parameter changes

2Power

If multiple GPIO circuits output transient currents simultaneously, then the overall drive capability is high, but voltage fluctuations (SSN) are introduced to power supply nodes

Engineering Contradiction:
Improveoverall drive capabilityVSAvoidpower supply stability
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The conductivity of the pre-driver transistor is adjusted via the slope control signal to reduce the slope of transient current. This parameter modification allows multiple GPIO circuits to operate simultaneously with reduced individual transient current slopes, thereby reducing cumulative SSN while preserving overall drive capability

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The system dynamically adjusts the transient current characteristics through slope control of the pre-driver transistor, enabling coordinated operation of multiple GPIO circuits. This dynamic control reduces simultaneous switching noise by moderating the rate of current change across multiple outputs

Inventive Principle:
Principle #15Dynamics

3Speed

If a steeply sloped transient current is output, then the signal transmission speed is fast, but significant ringing appears due to parasitic inductances in package and PCB

Engineering Contradiction:
Improvesignal transmission speedVSAvoidoutput waveform quality
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The slope control signal adjusts the conductivity of the pre-driver transistor to modify the transient current slope parameter. This enables optimization of the balance between signal transmission speed and ringing reduction by controlling the rate of current change

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The pre-driver transistor provides dynamic control over the transient current characteristics, allowing the system to maintain fast signal transmission while reducing the steepness of current edges that cause ringing when needed

Inventive Principle:
Principle #15Dynamics

Data Source

PatentEP4539339A1GPIO circuit and chip
Publication Date: 2025.04.16 GIGADEVICE SEMICON (BEIJING) INC
  • EP4539339A1 patent drawingFigure 1
  • EP4539339A1 patent drawingFigure 2
  • EP4539339A1 patent drawingFigure 3~4

AI summary

A GPIO circuit and a chip are provided. The GPIO circuit includes at least one output driver branch each including output driver transistor (MP, MN). A gate of the output driver transistor (MP, MN) is coupled to a respective pre-driver circuit (22, 21) including a conventional pre-driver circuit (221, 211), a pre-driver transistor (XN, XP) and a slow pre-driver (SPD) circuit (SPDp, SPDn). An output of the conventional pre-driver circuit (PG, NG) is coupled to the gate of the output driver transistor (MP, MN), and a gate of the pre-driver transistor is coupled to a slope control signal (SRB). A drain of the pre-driver transistor is coupled to one terminal of the conventional pre-driver circuit. The SPD circuit is coupled between a source and the drain of the pre-driver transistor (XN, XP). In order to output a signal (Data-IO), the SPD circuit is turned on, and the conventional pre-driver circuit is turned on under the control of the signal to be output (Data_o).