GPU Cache Memory Line Segmentation for Bandwidth Reduction
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Solution Overview
Problem
The increasing display resolution in graphic processing units (GPUs) leads to a sharp increase in memory bandwidth usage, necessitating a method to reduce memory bandwidth usage while processing graphic data.
Innovation Solution
A method and GPU architecture that utilize a shared memory line with a state bit to manage data replaceability within an n-way set associative cache structure, where data stored in shared memory lines is not replaceable, and data in cache lines is replaceable, optimizing memory usage by preventing unnecessary data transmission to external memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If display resolution is increased, then graphic processing quality is improved, but memory bandwidth usage increases sharply
Solution Approach 1:
The patent segments the cache structure into two distinct types of memory lines: shared memory lines for non-replaceable intermediate graphic data and cache lines for replaceable data. This segmentation allows the system to optimize memory bandwidth by preventing unnecessary transmissions of intermediate data while maintaining the ability to evict replaceable data when needed, thus resolving the contradiction between high display resolution requirements and memory bandwidth consumption
Solution Approach 2:
The patent applies local quality by differentiating the replaceability property between different memory lines within the same cache structure. Shared memory lines have the quality attribute of non-replaceability for intermediate data, while cache lines have replaceability. This localized differentiation enables selective memory management that reduces overall bandwidth usage without compromising display quality
2Productivity
If intermediate graphic data is stored in shared memory lines, then data processing efficiency is improved, but memory bandwidth usage increases
Solution Approach 1:
The patent extracts intermediate graphic data into dedicated shared memory lines with the non-replaceable attribute. By separating this specific data type from the general cache structure, the system can prevent these intermediate data from being evicted or unnecessarily transmitted to external memory, thereby maintaining processing efficiency while reducing wasteful bandwidth consumption
Solution Approach 2:
The patent implements preliminary action by pre-designating shared memory lines with the non-replaceable attribute before data processing occurs. This preliminary configuration ensures that intermediate graphic data is automatically retained in the appropriate memory location without requiring active management or additional bandwidth for transmission, thus improving efficiency while conserving bandwidth resources
Data Source
AI summary
A method and apparatus for processing graphic data, which are capable of decreasing a bandwidth of a memory, are provided. The method of processing graphic data includes receiving first graphic data and processing the first graphic data to generate second graphic data, and storing the generated second graphic data in a first shared memory line in which a state bit is set to a first state, wherein the first shared memory line is included in a first memory line set which is a part of an n-way set associative cache structure (n is a natural number equal to or greater than 2), at least one of the memory lines of the first memory line set is set to a second state which is different from the first state, and the state bit represents whether data stored in the memory line is replaceable.