GPU Shared-Function Cache with DSAT for 3D Pipeline State
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Solution Overview
Problem
The inefficient management of state information fetching in shared functions of a 3D pipeline in graphics processing units (GPUs) leads to high fetch latency and multiple memory accesses due to binding tables and frequent state changes, resulting in increased cost and performance degradation.
Innovation Solution
Implementing a local cache structure within the GPU's shared function pipeline that includes a binding table cache (BTC), state cache (SC), and direct state access table (DSAT) to facilitate efficient caching and retrieval of resource state, using a content-addressable memory (CAM) for direct mapping from binding table offsets to state information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If state information is fetched using binding tables in the conventional manner, then the system can access resource state, but the fetch latency increases and multiple memory accesses are required
Solution Approach 1:
The patent segments the state information storage into multiple cache levels (L1 cache with binding table cache and L2 cache with state cache), dividing the monolithic memory access structure into hierarchical segments that can be accessed with different latencies, thereby reducing overall fetch latency while managing complexity through structured organization
Solution Approach 2:
The patent implements preliminary action by pre-fetching and caching binding table entries and state information in the L1 and L2 caches before they are actually needed for texture sampling operations, so that when state information is required, it is already available in fast cache memory rather than requiring slow main memory access
2Productivity
If binding tables are used to manage resource state, then resource binding can be tracked, but the number of memory accesses increases
Solution Approach 1:
The patent introduces cache memory structures (binding table cache in L1 and state cache in L2) as intermediary layers between the texture sampler and main memory, allowing state information to be retrieved from fast cache memory instead of slow main memory, thereby improving productivity while reducing memory access time
Solution Approach 2:
The patent replaces the mechanical system of direct main memory access with a cache-based memory hierarchy, substituting the slow but simple main memory access mechanism with a faster but more complex cache system that uses associative memory and tag matching to accelerate state information retrieval
3Adaptability or versatility
If state information is cached with duplicate entries, then all state variations are available, but caching efficiency decreases and memory bandwidth is wasted
Solution Approach 1:
The patent uses the direct state access table to perform preliminary action by pre-computing and storing the correct index into the state cache before the texture sampling operation, so that the cache can directly retrieve the needed state information without generating duplicate entries or requiring broad memory coverage
Solution Approach 2:
The patent implements feedback through the direct state access table that provides information about which state entries are actually needed, allowing the cache system to adjust its behavior and only cache the specific state information that will be used, thereby maintaining adaptability while reducing memory bandwidth consumption by avoiding caching of unnecessary duplicate entries
Data Source
AI summary
Embodiments described herein are generally directed to a local cache structure within a shared function of a 3D pipeline that facilitates efficient caching of resource state. In an example, the cache structure is maintained within a sub-core of a GPU. The local cache structure includes (i) an SC having entries each containing a state of a binded resource, and (ii) a DSAT having entries each containing an index into the SC. The DSAT is tagged by SBTO values representing addresses of entries of a binding table. A request, including information indicative of an SBTO pointing to an entry within the binding table, is received for a state of a particular binded resource being accessed by a shared function of the 3D pipeline. Based on the SBTO and during a single access to the cache structure, a determination is made regarding whether the state of the particular binded resource is present.