Graded Germanium Polysilicon Upper Electrode for DRAM Capacitors
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Solution Overview
Problem
The high electrical resistivity of the upper electrode in DRAM capacitors leads to local voltage fluctuations, causing noise and malfunctions in memory cells due to the connection of upper electrodes among multiple memory cells.
Innovation Solution
A semiconductor device with a lower electrode, a dielectric film, and an upper electrode featuring a polycrystalline silicon layer with a graded germanium concentration, where the concentration is lower in the upper portion to reduce resistivity and prevent metallic film peeling, while maintaining low-temperature deposition to avoid dielectric film degradation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the upper electrode is formed with a polycrystalline layer of fourth group semiconductor material (SIM structure), then the structure stability is improved and leak current is suppressed, but the electrical resistivity of the upper electrode becomes high
Solution Approach 1:
The patent applies local quality by creating a polycrystalline silicon layer with non-uniform germanium concentration distribution. The lower portion (near the dielectric film) has high germanium concentration to prevent peeling and maintain stability, while the upper portion has low germanium concentration to reduce electrical resistivity. This spatial variation in material composition resolves the contradiction between structural stability and electrical conductivity.
Solution Approach 2:
The patent changes the compositional parameter of germanium concentration within the polycrystalline silicon layer. By controlling the germanium concentration to decrease from the lower portion to the upper portion, the material properties are optimized: high germanium content provides structural stability and adhesion, while low germanium content reduces resistivity. This parameter gradient approach simultaneously achieves both stability and low resistance.
2Strength
If high germanium concentration is used in the polycrystalline silicon layer, then the adhesion to dielectric film is improved, but the electrical resistivity increases
Solution Approach 1:
The patent applies local quality by concentrating high germanium content in the lower portion of the polycrystalline silicon layer where adhesion to the dielectric film is critical, while maintaining low germanium content in the upper portion where electrical conductivity is paramount. This localized differentiation of material composition simultaneously optimizes both adhesion strength and electrical conductivity in their respective regions.
3Reliability
If low-temperature deposition is used to form the polycrystalline silicon layer, then the dielectric film is protected from degradation, but the crystallization quality may be affected
Solution Approach 1:
The patent changes the deposition temperature parameter to a low range (below 450°C) to protect the dielectric film from thermal degradation. Combined with controlled germanium concentration and doping, this temperature parameter adjustment enables the formation of a polycrystalline silicon layer with sufficient crystallization quality and low resistivity without compromising the underlying dielectric film structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively lowers the electrical resistance of the upper electrode, reduces leakage current, and prevents metallic film peeling, thereby stabilizing the capacitor structure and improving data retention in DRAM devices.
Implementation Method 1
a concentration of germanium in an upper portion of the polycrystalline silicon layer is lower than that in a lower portion of the polycrystalline silicon layer
Implementation Method 2
a metallic member contacted with an upper surface of the polycrystalline silicon layer
Implementation Method 3
a dielectric film on the lower electrode
Data Source
AI summary
In a semiconductor device including a capacitor which has an upper electrode, a polycrystalline silicon layer on the upper electrode, and a metallic member on the polycrystalline silicon layer, the polycrystalline silicon layer includes germanium so that an upper portion of the polycrystalline silicon layer is lower than a lower portion thereof in a concentration of germanium.


