Grain Growth Promotion Layer for Semiconductor Interconnects

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Solution Overview

Problem

Prior art interconnect structures suffer from low electromigration resistance due to a high number of electromigration paths resulting from the microstructure and average grain size of the conductive material, which is expected to worsen with the scaling of semiconductor devices.

Innovation Solution

The implementation of a grain growth promotion layer to form a conductive region within the interconnect structure with a bamboo microstructure and an average grain size larger than 0.05 microns, reducing electromigration by minimizing grain boundaries and enhancing the reliability and performance of the structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional interconnect structures are used, then manufacturing is simpler, but electromigration resistance is low due to high number of electromigration paths

Engineering Contradiction:
Improveelectromigration resistanceVSAvoidmicrostructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by creating a specific grain structure (bamboo microstructure with grains larger than 0.05 microns) in the conductive material region. This localized microstructural control reduces electromigration paths specifically where needed, without changing the overall interconnect structure. The grain growth promotion layer is applied locally at the conductive material interface to achieve this specific grain structure.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent uses composite materials by introducing a grain growth promotion layer (comprising Ru, Ir, Rh, Mo, Re, Hf, Nb or alloys thereof) in combination with the conductive material (Cu, Al, W or alloys). This composite structure promotes the formation of large-grained bamboo microstructure, which reduces electromigration while maintaining electrical conductivity.

Inventive Principle:
Principle #40Composite materials

2Reliability

If grain size is reduced, then more grains fit in the interconnect, but electromigration resistance decreases due to more grain boundaries

Engineering Contradiction:
Improveelectromigration resistanceVSAvoidgrain size control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies parameter changes by modifying the grain size parameter to be larger than 0.05 microns and forming a bamboo microstructure where grains extend through the thickness of the conductive material. This parameter change reduces the number of grain boundaries and electromigration paths. The grain growth promotion layer facilitates achieving this specific grain size parameter.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If bamboo microstructure is formed with large grain size, then electromigration is reduced, but manufacturing process becomes more complex

Engineering Contradiction:
Improveelectromigration resistanceVSAvoidfabrication process simplicity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent uses an intermediary approach by introducing a grain growth promotion layer as a mediator between the diffusion barrier and the conductive material. This intermediate layer facilitates the formation of large-grained bamboo microstructure during the filling process, achieving improved electromigration resistance without requiring complex post-processing steps.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Reliability

If conventional polycrystalline microstructure is used, then manufacturing is easier, but electron scattering is higher and electrical resistance is higher

Engineering Contradiction:
Improveelectrical conductivityVSAvoidmicrostructure control
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by creating a specific grain structure (bamboo microstructure with grains larger than 0.05 microns) in the conductive material region. This localized microstructural control reduces electromigration paths specifically where needed, without changing the overall interconnect structure. The grain growth promotion layer is applied locally at the conductive material interface to achieve this specific grain structure.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent uses composite materials by introducing a grain growth promotion layer (comprising Ru, Ir, Rh, Mo, Re, Hf, Nb or alloys thereof) in combination with the conductive material (Cu, Al, W or alloys). This composite structure promotes the formation of large-grained bamboo microstructure, which reduces electromigration while maintaining electrical conductivity.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution significantly reduces electromigration, providing a conductive material with lower electron scattering and electrical resistance, resulting in improved performance and reliability, capable of withstanding higher current densities.

Implementation Method 1

a grain growth promotion layer which promotes the formation of a conductive region within the interconnect structure that has a bamboo microstructure and an average grain size of larger than 0.05 microns

Methodology Applied
Scientific EffectGrain growth: Crystallisation

Implementation Method 2

a diffusion barrier located within said at least one opening

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Data Source

PatentUS7666787B2Grain growth promotion layer for semiconductor interconnect structures
Publication Date: 2010.02.23 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US7666787B2 patent drawing
  • US7666787B2 patent drawing
  • US7666787B2 patent drawing

AI summary

An interconnect structure of the single or dual damascene type and a method of forming the same, which substantially reduces the electromigration problem that is exhibited by prior art interconnect structures, are provided. In accordance with the present invention, a grain growth promotion layer, which promotes the formation of a conductive region within the interconnect structure that has a bamboo microstructure and an average grain size of larger than 0.05 microns is utilized. The inventive structure has improved performance and reliability.