Graph-Processing Accelerator for Scalable Distributed Data

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Solution Overview

Problem

Existing graph computing systems face performance bottlenecks and lack flexibility due to the large size of graph datasets, which are often distributed across multiple memory devices, leading to increased communication latency and varying hardware and software interfaces when scaling.

Innovation Solution

A scalable graph-processing accelerator architecture that deploys specialized hardware units such as SIMD or systolic-array-based throughput processing units, vertex processing units, format shuffle units, and programmable gather/scatter units, allowing for graph data processing close to where the data resides, with a unified programming interface across different locations in the computing system.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If graph datasets are distributed over multiple memory devices to handle large-scale data, then the system can process larger graph datasets, but communication latency increases and performance bottlenecks occur

Engineering Contradiction:
Improvegraph dataset sizeVSAvoidcommunication latency
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The system segments the graph processing workload across multiple computing nodes, with each node handling a specific partition of the graph dataset. This segmentation allows parallel processing while maintaining data locality, reducing the need for frequent inter-node communication and mitigating latency issues associated with distributed memory access.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a unified programming interface that acts as an intermediary between the user and the distributed graph processing system. This interface abstracts the complexity of data distribution and communication, providing a consistent API that handles data placement, retrieval, and processing across multiple memory devices without exposing communication latency to the user.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If multiple computing nodes are used to scale the graph computing system, then larger graph datasets can be processed, but performance bottlenecks and lack of flexibility occur

Engineering Contradiction:
Improvegraph dataset sizeVSAvoidsystem flexibility
Core Design Contradiction:
Quantity of substanceVSAdaptability or versatility

Solution Approach 1:

The patent implements a universal programming interface that provides consistent functionality across different computing nodes and configurations. This interface allows the same graph processing algorithms to be executed on various hardware platforms (CPU, GPU, FPGA) without modification, enhancing system flexibility and adaptability while maintaining the ability to scale across multiple nodes.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system employs dynamic data placement and processing strategies that can adapt to different hardware configurations and workload characteristics. The unified interface allows runtime adjustments in data distribution and processing allocation across computing nodes, enabling the system to optimize performance and maintain flexibility as the scale and requirements change.

Inventive Principle:
Principle #15Dynamics

3Productivity

If specialized hardware units are deployed for graph processing, then processing performance is improved, but hardware complexity increases

Engineering Contradiction:
Improvegraph processing performanceVSAvoidhardware architecture
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements self-service mechanisms where the unified programming interface automatically manages data formatting, shuffling, and gathering operations. The system includes built-in format shuffle units and gather/scatter units that autonomously handle data transformation between different storage formats and processing formats, reducing the burden on users and simplifying the effective hardware complexity they must manage.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The unified programming interface serves as an intermediary layer between the user and the complex specialized hardware units. It abstracts the complexity of SIMD processors, systolic arrays, and other specialized components by providing a consistent high-level interface, allowing users to leverage hardware acceleration without directly managing the underlying hardware complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11921784B2Flexible, scalable graph-processing accelerator
Publication Date: 2024.03.05 ADVANCED MICRO DEVICES INC
  • US11921784B2 patent drawing
  • US11921784B2 patent drawing
  • US11921784B2 patent drawing

AI summary

An accelerator device includes a first processing unit to access a structure of a graph dataset, and a second processing unit coupled with the first processing unit to perform computations based on data values in the graph dataset.