Self-Forming Graphene Barrier for Interconnects
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Solution Overview
Problem
Conventional interconnects, particularly those using copper, face high resistance and diffusion issues due to the limitations of traditional barrier materials, which restrict the performance and reliability of interconnects as device dimensions shrink.
Innovation Solution
The implementation of a self-forming wrap-all-around graphene barrier layer surrounding interconnects, formed through various processes such as annealing carbon layers to diffuse carbon atoms and create graphene barriers at metal-dielectric interfaces, reduces line resistance and prevents metal diffusion into dielectrics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional barrier materials like TiN or TaN are used to prevent Cu diffusion, then metal diffusion is prevented, but the barrier layer thickness increases and Cu content is limited, thereby increasing line resistance
Solution Approach 1:
The patent changes the material parameter from conventional barrier materials (TiN, TaN) to graphene, which has superior diffusion barrier properties at atomic thickness. This material substitution enables the barrier to be extremely thin while maintaining effective diffusion prevention, thereby reducing line resistance without sacrificing reliability
Solution Approach 2:
The patent employs a thin film graphene layer as the diffusion barrier. The graphene film is so thin that it does not significantly increase the interconnect dimensions or resistance, yet it provides complete wrap-around coverage that effectively prevents metal diffusion into the dielectric
2Object-affected harmful factors
If Cu interconnects are used to achieve low resistance, then line resistance is reduced, but Cu diffuses into surrounding dielectric requiring thick barrier layers
Solution Approach 1:
The patent changes the barrier material parameter from conventional materials to graphene, which has fundamentally different properties - it can provide complete diffusion blocking at atomic thickness rather than requiring nanometer-scale thickness. This enables Cu interconnects to maintain low resistance while the graphene barrier provides sufficient diffusion prevention
Solution Approach 2:
The patent creates a composite structure combining Cu interconnect with graphene barrier layer. The Cu provides excellent electrical conductivity for low line resistance, while the graphene layer provides superior diffusion barrier properties, creating a synergistic composite that solves both the low resistance and diffusion prevention requirements
3Object-affected harmful factors
If Co is used to replace Cu to reduce liner requirements, then line resistance is improved, but Co still diffuses into dielectric requiring thin barriers for TDDB reliability
Solution Approach 1:
The patent changes the barrier material parameter to graphene, which provides superior diffusion blocking capability compared to conventional barriers. This enables the use of Co interconnects with minimal or no liner requirements while the graphene barrier ensures TDDB reliability by preventing Co diffusion into the dielectric
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances interface scattering and resistance while maintaining a thin barrier, improving the reliability and performance of interconnects by effectively preventing metal diffusion and reducing line resistance.
Implementation Method 1
The interconnect and the graphene layer can be annealed under conditions sufficient to diffuse carbon atoms from the graphene layer to form a buried graphene layer at an interface between the dielectric and the interconnect
Data Source
AI summary
The present invention provides interconnects with self-forming wrap-all-around graphene barrier layer. In one aspect, a method of forming an interconnect structure is provided. The method includes: patterning at least one trench in a dielectric; forming an interconnect in the at least one trench embedded in the dielectric; and forming a wrap-all-around graphene barrier surrounding the interconnect. An interconnect structure having a wrap-all-around graphene barrier is also provided.