Multi-layer Graphene Channel Device for High-Frequency RF Transistors
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Solution Overview
Problem
Existing graphene electronic devices face challenges in improving drain current and current gain characteristics, particularly due to limitations in carrier mobility and electrical connections between graphene channel layers, which affect their performance in high-frequency applications.
Innovation Solution
A graphene electronic device design featuring multiple graphene channel layers with specific gate insulating films and electrode configurations, including a first and second gate insulating film made of materials like silicon oxide, silicon nitride, or hafnium oxide, to enhance carrier mobility and reduce electrical connections, allowing for improved current flow and gain.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single graphene channel layer is used, then the device structure is simple, but the drain current and current gain characteristics are insufficient
Solution Approach 1:
The patent divides the graphene channel into multiple separate layers (first graphene channel layer and second graphene channel layer) instead of using a single layer. This segmentation allows each layer to contribute independently to the current flow, thereby increasing the total drain current and current gain while maintaining manageable structural complexity through systematic arrangement.
Solution Approach 2:
The patent transitions from a single-plane channel structure to a multi-layer vertical structure by stacking graphene channel layers at different heights. The first gate insulating film and second gate insulating film create distinct vertical levels, enabling current flow through multiple parallel paths in the vertical dimension, thus enhancing drain current without significantly increasing horizontal device footprint.
2Productivity
If multiple graphene channel layers are stacked without proper insulation, then current gain increases, but electrical connections between layers cause performance degradation
Solution Approach 1:
The patent introduces gate insulating films (first gate insulating film and second gate insulating film) as intermediary layers between the graphene channel layers and gate electrodes. These insulating films prevent direct electrical contact between adjacent graphene layers while allowing electric field penetration for effective gate control, thereby maintaining current gain enhancement without compromising electrical connection stability.
Solution Approach 2:
The patent applies different insulating materials with specific properties to different locations: the first gate insulating film is positioned between the first graphene channel layer and the gate electrode, while the second gate insulating film is positioned between the second graphene channel layer and the gate electrode. This localized application of insulating properties ensures optimal electrical isolation and field control at each interface, preventing unwanted electrical connections while maintaining high current gain.
3Speed
If high carrier mobility is achieved through material optimization, then high-frequency performance improves, but driving voltage increases
Solution Approach 1:
The patent segments the channel into multiple graphene layers, allowing the electric field from the gate to be distributed more effectively across each layer. This segmentation enables high carrier mobility in each individual layer to be utilized efficiently, achieving high-frequency performance without requiring proportionally higher driving voltage, as the voltage is distributed across multiple insulated layers rather than concentrated in a single thick channel.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves increased carrier mobility and current gain, reducing the driving voltage and enhancing high-speed operation, making the graphene electronic device suitable for high-frequency applications such as RF transistors.
Implementation Method 1
a first gate insulating film between the plurality of the graphene channel layers, a second gate insulating film covering the plurality of graphene channel layers between the source electrode and the drain electrode
Implementation Method 2
The second gate insulating film may have a thickness in a range from about 10 nm to about 200 nm
Implementation Method 3
Graphene is a zero gap semiconductor and has a mobility of 100,000 cm2V−1s−1 at room temperature, which is approximately 100 times higher than that of silicon
Data Source
AI summary
Graphene electronic devices may include a gate electrode on a substrate, a first gate insulating film covering the gate electrode, a plurality of graphene channel layers on the substrate, a second gate insulating film between the plurality of graphene channel layers, and a source electrode and a drain electrode connected to both edges of each of the plurality of graphene channel layers.