Graphene Layer Circuit Board Adhesion and Signal Integrity

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Solution Overview

Problem

Existing circuit boards face poor heterogeneous adhesion between solder mask dielectric materials and outer circuits, leading to issues like penetration and discoloration during electroless plating, and surface roughening to enhance adhesion affects signal transmission, causing signal loss.

Innovation Solution

Incorporating a graphene oxide layer between the insulating material layer and the build-up circuit structure, which is then reduced to a graphene layer, to improve adhesion and enhance the reliability and yield of the circuit board, while also providing excellent thermal and electrical conductivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If surface roughening is applied to enhance adhesion between solder mask dielectric material and outer circuit, then binding force is improved, but signal transmission deteriorates causing signal loss

Engineering Contradiction:
Improvebinding forceVSAvoidsignal transmission
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

A graphene layer is introduced as an intermediary between the outer circuit and the insulating material layer. This graphene layer serves dual functions: it enhances the binding force between the interfaces while maintaining smooth surface properties that preserve signal transmission characteristics, thereby resolving the contradiction between adhesion strength and signal integrity

Inventive Principle:
Principle #24Intermediary (Mediator)

2Strength

If existing surface binders are used to enhance organic/metal interface binding, then binding force is improved, but heterogeneous adhesion between different materials deteriorates

Engineering Contradiction:
Improvebinding forceVSAvoidheterogeneous adhesion
Core Design Contradiction:
StrengthVSAdaptability or versatility

Solution Approach 1:

The graphene layer exhibits universal binding capability that works effectively across different material interfaces including organic/organic and organic/metal interfaces. This single material solution replaces the need for different surface binders for different interface types, achieving both strong binding force and broad adaptability to heterogeneous materials

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Ease of manufacture

If electroless plating is performed on outer circuit with insufficient binding force, then surface treatment is completed, but penetration and discoloration occur on the bottom sidewall of opening

Engineering Contradiction:
Improveelectroless plating processVSAvoidplating quality
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The graphene layer acts as an intermediary barrier layer between the outer circuit and the insulating material layer, preventing plating solution penetration into the opening bottom sidewall while maintaining good electrical conductivity for the electroless plating process, thus eliminating discoloration and penetration defects

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The graphene oxide and graphene layers enhance the binding force between the insulating material and the build-up circuit structure, improving reliability and yield, and provide effective heat dissipation and protection against oxidation.

Implementation Method 1

the portion of the graphene oxide layer is reduced to a graphene layer

Methodology Applied
Scientific EffectChemical reduction: Reduction

Data Source

PatentUS11991837B2Circuit board and manufacturing method thereof
Publication Date: 2024.05.21 UNIMICRON TECH CORP
  • US11991837B2 patent drawing
  • US11991837B2 patent drawing
  • US11991837B2 patent drawing

AI summary

A circuit board includes a substrate, a build-up circuit structure, a graphene oxide layer, a graphene layer, and an insulating material layer. The build-up circuit structure is disposed on the substrate, including at least one inner circuit, at least one dielectric layer, an outer circuit, and multiple conductive vias. The dielectric layer is disposed on the inner circuit. The outer circuit is disposed on the dielectric layer. The conductive vias penetrate the dielectric layer and electrically connect the inner circuit and the outer circuit. The graphene oxide layer and the graphene layer are disposed on the build-up circuit structure at an interval. The graphene oxide layer and the graphene layer are respectively disposed in correspondence to the dielectric layer and the outer circuit. The insulating material layer is disposed on the graphene oxide layer and the graphene layer. The insulating material layer has an opening, which exposes the graphene layer.