Graphene Transistor with Tunnel Junction for High On/Off Ratio

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Solution Overview

Problem

Graphene-based transistors face challenges due to the finite conductivity of graphene at the Dirac point and the inability to prevent lateral electron flow, limiting the on/off ratio to values below 10, which is insufficient for integrated circuits.

Innovation Solution

A graphene transistor design featuring a graphene layer structure with an insulating cap, a source contact at one edge, an insulator at the opposite edge, and a drain contact separated from the graphene by the insulator, creating a tunnel junction for improved current modulation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If graphene is used as the channel material in a transistor, then high carrier mobility is achieved, but the on/off ratio is limited to values below 10 due to finite conductivity at the Dirac point and Klein tunnelling

Engineering Contradiction:
Improvecarrier mobilityVSAvoidon/off ratio
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

An insulating layer is introduced as an intermediary between the drain contact and the graphene channel. This mediator enables tunnel junction formation that blocks lateral electron flow through the graphene while maintaining vertical current modulation via the gate, thereby achieving high on/off ratios without compromising carrier mobility in the channel

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention transitions from planar contact geometry to a vertical tunnel junction architecture. By stacking the insulating layer and drain contact vertically over the graphene channel edge, the current flow is redirected from lateral propagation through the graphene to vertical tunneling through the insulator, enabling effective current modulation

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If a tunnel barrier is positioned underneath source or drain contacts to enable vertical tunnelling, then current modulation is improved, but fabrication complexity increases due to challenges in achieving correct thickness and preventing leakage

Engineering Contradiction:
Improvecurrent modulationVSAvoidfabrication complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The insulating layer is deposited conformally over the substrate before graphene transfer and contact formation. This preliminary positioning of the tunnel barrier simplifies subsequent fabrication steps, as the tunnel junction geometry is pre-established and does not require complex post-processing alignment or thickness control

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention changes the material parameter of the insulating layer to achieve appropriate tunneling characteristics. By selecting materials with suitable bandgaps and controlling layer thickness within specific ranges, effective tunnel junctions are formed with standardized fabrication processes, reducing complexity

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design achieves a significant improvement in current on/off ratios, enabling more reliable and efficient graphene-based transistors suitable for mass production and integration into circuits.

Implementation Method 1

a drain contact separated from the graphene by the insulator to provide a tunnel junction

Methodology Applied
Scientific EffectTunnel junction:

Data Source

PatentUS20250151315A1A transistor and a method for the manufacture of a transistor
Publication Date: 2025.05.08 PARAGRAF LTD
  • US20250151315A1 patent drawing
  • US20250151315A1 patent drawing
  • US20250151315A1 patent drawing

AI summary

There is provided a transistor comprising: a graphene layer structure provided on a non-metallic surface of a substrate, the graphene layer structure having an insulating cap; a source contact provided in contact with a first edge of the graphene layer structure; an insulator provided in contact with an opposite, second edge of the graphene layer structure; a drain contact provided in contact with the insulator, whereby there is a distance of least separation between the drain contact and the graphene layer structure along the second edge of the graphene layer structure and through the insulator; and a gate contact provided (i) over the graphene layer structure and separated therefrom by the insulating cap and/or (ii) under the graphene layer structure and separated therefrom by substrate.