Grid-Shaped Common Source Plate for STT-MRAM Current Reduction
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Solution Overview
Problem
Conventional STT-MRAM devices require higher current for read and write operations compared to other non-volatile memory technologies, limiting their ability to achieve high-density cell array layouts and efficient data storage.
Innovation Solution
A magnetic memory cell array structure with a common source plate that extends at angles to bit and word lines, allowing for staggered magnetic tunnel junctions and reduced electrical current requirements, enabling the use of higher resistivity materials and improving cell density to 8F2 size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional STT-MRAM cell structure is used, then magnetic tunnel junction region is formed with fixed and free regions, but higher current is required for read and write operations
Solution Approach 1:
The common source plate extends in two directions (first and second directions at angles to bit and word lines) to create a two-dimensional current distribution pattern. This dimensional change allows current to reach multiple magnetic tunnel junction regions through different paths, reducing the current magnitude needed for each individual cell operation while maintaining reliable data storage across the array.
Solution Approach 2:
The common source plate is divided into multiple linear portions extending in different directions, with each portion serving specific magnetic tunnel junction regions. This segmentation allows optimized current paths for different cell groups, reducing overall current requirements while maintaining reliable operation of each segmented region.
2Reliability
If higher current is required for operations, then magnetic tunnel junction region can be formed, but high-density cell array layout is limited
Solution Approach 1:
By extending the common source plate in two directions rather than a single linear path, the design efficiently utilizes two-dimensional space. This allows magnetic tunnel junction regions to be arranged in a staggered high-density pattern while maintaining reliable current paths to each cell, achieving 8F2 cell size through optimized spatial arrangement.
Solution Approach 2:
Different linear portions of the common source plate are positioned at specific angles to bit and word lines to optimize current delivery to local groups of magnetic tunnel junctions. This local optimization allows each region to operate reliably with lower current while enabling higher overall cell density through efficient space utilization.
3Area of stationary object
If common source plate extends at angles to bit and word lines, then cell density increases to 8F2 size, but manufacturing complexity increases
Solution Approach 1:
The common source plate employs asymmetric linear portions extending at different angles to bit and word lines rather than symmetric arrangements. This asymmetric design achieves the 8F2 cell density target by optimizing current paths for the specific staggered magnetic tunnel junction layout, while the angles are chosen to be manufacturable with standard fabrication processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces the electrical current needed for operations, allows for higher resistivity materials, and increases the number of bits per column, enhancing data storage capabilities while maintaining low resistance and efficient data access.
Implementation Method 1
a common source plate electrically coupled to the at least one source contact. The common source plate may include linear portions that extend in two directions that are at a first angle to bit lines and at a second angle to word lines of the array
Implementation Method 2
MRAM is a non-volatile computer memory technology based on magnetoresistance. The fixed region 12 and the free region 14 form a magnetic cell core. In the parallel configuration, the STT-MRAM cell 10 exhibits a lower electrical resistance across the magnetoresistive elements. In the anti-parallel configuration, the STT-MRAM cell 10 exhibits a higher electrical resistance
Implementation Method 3
Switching of the magnetic orientation of the free region 14 may be accomplished by passing a programming current through the STT-MRAM cell 10 and the fixed region 12 and free region 12 therein. The fixed region 12 polarizes the electron spin of the programming current, and torque is created as the spin-polarized current passes through the cell 10. When the torque of the spin-polarized electron current passing through the cell 10 is greater than a critical switching current density (Jc) of the free region 14, the direction of the magnetic orientation of the free region 14 is switched
Data Source
AI summary
Magnetic memory devices include an array of magnetic memory cells including magnetic tunnel junction regions. The array of magnetic memory cells includes access lines extending in a column direction and data/sense lines extending in a row direction transverse to the column direction. A common source plate electrically couples magnetic memory cells of the array in both the column direction and the row direction. Electronic systems include such a magnetic memory device operably coupled to a processor, to which at least one input device and at least one output device is operably coupled. Methods of fabricating magnetic memory devices include forming such an array of magnetic memory cells including a common source plate.