Grooved Storage Capacitor Layout for High-Resolution OLED Panels

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Solution Overview

Problem

High-resolution OLED display panels face insufficient charge and discharge due to small capacitance, leading to performance issues.

Innovation Solution

The array substrate design includes a capacitance area with a first storage capacitor featuring a substrate, a first insulating layer with defined grooves, and electrode plates, where the second electrode plate is partially filled in the grooves, increasing the facing area and reducing the distance between the plates, thereby enhancing the charge storage capacity and capacitance value.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the display panel uses high resolution design, then the image quality is improved, but the capacitance becomes small causing insufficient charge and discharge

Engineering Contradiction:
Improvedisplay resolutionVSAvoidcharge and discharge sufficiency
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent introduces a three-dimensional groove structure into the capacitor electrode, transforming the traditional planar two-dimensional electrode into a multi-dimensional structure. The groove extends vertically into the insulating layer, creating additional storage volume without increasing the horizontal footprint, thus maintaining high display resolution while improving capacitance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The groove structure is nested within the insulating layer, with the capacitor electrode extending into the groove space. This nested configuration allows the capacitor to utilize the vertical space within the existing layer structure, effectively increasing capacitance without adding external components or increasing the overall device area.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Reliability

If the capacitance value is increased to improve charge storage, then the charge and discharge performance is improved, but the device structure becomes more complex

Engineering Contradiction:
Improvecharge storage capacityVSAvoidcapacitor structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The capacitor groove is integrated into the existing insulating layer that is already part of the thin-film transistor structure. The groove is formed within the same insulating material layer, and the capacitor electrode merges with the transistor electrode layers, eliminating the need for separate capacitor components and reducing overall structural complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The groove structure is localized to specific regions where capacitance is needed, rather than uniformly modifying the entire device. The groove depth, width, and positioning are optimized locally to achieve the required capacitance value while maintaining simplicity in other areas of the device where such modifications are unnecessary.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively increases the capacitance value, addressing the problem of insufficient charge and discharge, and improving the overall performance of the display panel by enhancing the ability to store charges.

Implementation Method 1

the second electrode plate is located at a side of the first insulating layer away from the substrate and is partially filled in the first grooves... increasing a facing area between the first electrode plate and the second electrode plate... so as to charge storage capacity of the first storage capacitor is increased, and capacitance value is increased

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS20240213277A1Array substrate and display panel
Publication Date: 2024.06.27 SHENZHEN CHINA STAR OPTOELECTRONICS SEMICON DISPLAY TECH CO LTD
  • US20240213277A1 patent drawing
  • US20240213277A1 patent drawing
  • US20240213277A1 patent drawing

AI summary

An array substrate and a display panel are provided in the present application. The array substrate includes a thin-film transistor area and a capacitance area located around the thin-film transistor area. The capacitance area includes a substrate, a first insulating layer and a first storage capacitor. The first insulating layer is arranged on the substrate. A plurality of first grooves are defined on the first insulating layer. The first storage capacitor includes a first electrode plate and a second electrode plate arranged opposite and insulated from the first electrode plate. The first electrode plate is arranged on the substrate. The second electrode plate is located at the side of the first insulating layer away from the substrate, and is partially filled in the first grooves.