Ground Via Optimization for High Speed Serial Interfaces
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Solution Overview
Problem
In high-speed serial interfaces, existing printed circuit board (PCB) designs face challenges in optimizing the placement and number of ground vias relative to signal vias to achieve optimal signal quality, as increased signal speeds exacerbate issues like crosstalk and reflections, relying heavily on experience and symmetric placement without a systematic approach.
Innovation Solution
The PCB design incorporates a systematic method for determining the angle and placement of ground vias in relation to signal vias, using specific equations to calculate the optimal angle based on the distance between signal and ground vias, allowing for a more precise and efficient layout that improves signal quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ground vias are placed symmetrically around signal vias based on experience, then the design process is simple, but signal quality deteriorates due to crosstalk and reflections at high speeds
Solution Approach 1:
The patent applies parameter changes by transitioning from empirical, symmetric via placement to a mathematically optimized placement scheme. Specific parameters including the angle θ = arccos(1 - d/(2R)), distance R, and number of ground vias n are calculated using equations that relate via spacing d, signal frequency f, and PCB material properties. This systematic parameter optimization resolves the contradiction by achieving superior signal quality through calculated placement rather than simple symmetric arrangements.
Solution Approach 2:
The patent implements preliminary action by pre-calculating the optimal via placement parameters before PCB manufacturing. The design methodology computes the optimal angle, radius, and number of ground vias in advance using the provided equations, allowing designers to implement the optimized layout directly without iterative adjustments during manufacturing or testing. This resolves the complexity issue by providing a deterministic design process rather than requiring complex iterative optimization.
2Reliability
If the number of ground vias is increased to improve signal quality, then crosstalk and reflections are reduced, but manufacturing complexity and cost increase
Solution Approach 1:
The patent resolves this contradiction through parameter optimization that determines the minimum necessary number of ground vias for achieving target signal quality. The equation n ≥ (πR)/(d√2) calculates the optimal number of ground vias based on the available space R and via spacing d, preventing both insufficient grounding and excessive via counts that would complicate manufacturing. This mathematical approach identifies the sweet spot where signal quality is maximized without unnecessary manufacturing complexity.
3Reliability
If ground vias are placed closer to signal vias to reduce crosstalk, then electromagnetic interference immunity improves, but the risk of signal ground coupling increases
Solution Approach 1:
The patent applies asymmetry by positioning ground vias at a specific calculated angle θ = arccos(1 - d/(2R)) relative to the signal via, rather than using symmetric placement. This asymmetric arrangement optimizes the current return path geometry to minimize both crosstalk and ground coupling simultaneously. The angular positioning creates an optimal balance where ground vias are close enough to provide EMI immunity but positioned to avoid direct coupling with signal vias.
Solution Approach 2:
The patent uses parameter changes to optimize the distance R and angle θ between ground and signal vias. By calculating these parameters based on signal frequency, via spacing, and PCB material properties, the design achieves the optimal balance between EMI immunity and ground coupling prevention. The equations provide specific parameter values that simultaneously minimize harmful effects rather than requiring trade-offs.
Data Source
AI summary
A printed circuit board (PCB) for an information handling system includes first and second signal vias, and a quantity of ground vias. The first signal via is separated from the second signal via by a first distance. The ground vias are grouped into pairs and each ground via of each pair is separated from one of the first or second signal vias by a second distance. The location of the ground vias in terms of an angle between the ground vias is given as an expression relating the first distance, the second distance, and the quantity of ground vias.


