Group III-Nitride Semiconductor Device With Cap Layer
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Solution Overview
Problem
Conventional semiconductor devices with MIS type HFETs face challenges in reducing source resistance while enhancing transconductance, as thinning the barrier layer to increase transconductance leads to reduced electron density and increased parasitic resistance, and the process technology limits the shortening of electrode distances.
Innovation Solution
A semiconductor device with a low-resistance cap layer between the source electrode and the barrier layer, and an insulating film on the exposed barrier layer, which reduces source resistance and increases electron density through a layered structure of group III nitride semiconductors, including AlGaN and GaN, and a silicon nitride insulating film to modulate the 2DEG channel potential.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the barrier layer is thinned to increase transconductance, then transconductance is improved, but electron density in the channel reduces and parasitic resistance increases
Solution Approach 1:
The device is segmented into multiple functional layers: the barrier layer (AlGaN) is separated from the source electrode by a cap layer structure. This segmentation allows the barrier layer to be thinned for high transconductance while the cap layer compensates for increased parasitic resistance, resolving the contradiction between these two parameters.
Solution Approach 2:
A cap layer made of group III nitride semiconductor is introduced as an intermediary between the source electrode and the barrier layer. This intermediary layer modulates the potential distribution and electron density in the channel region, enabling thin barrier layer operation while maintaining low parasitic resistance through controlled electron accumulation.
2Reliability
If the distance between source electrode and gate electrode is shortened to reduce source resistance, then source resistance is reduced, but process technology limits such shortening
Solution Approach 1:
Instead of reducing the horizontal distance between source electrode and gate electrode (which is limited by lithography resolution), the solution moves to the vertical dimension by introducing a cap layer structure. The cap layer's thickness and composition are controlled to achieve the desired electrical characteristics without being constrained by planar process limitations.
3Reliability
If a cap layer is provided to reduce source resistance, then source resistance is reduced, but the exposed barrier layer requires additional insulating film formation
Solution Approach 1:
The cap layer structure serves multiple functions simultaneously: it reduces source resistance by modulating electron density, provides a platform for gate electrode formation, and the insulating film on the exposed barrier layer serves both as electrical isolation and as part of the gate stack. This multi-functionality reduces the need for separate dedicated structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces source resistance and enhances transconductance, achieving higher high-frequency characteristics and breakdown voltage, as demonstrated by increased maximum oscillation frequency and current gain cutoff frequency.
Implementation Method 1
an insulating film formed on a part in a gate electrode formation region of the barrier layer which is exposed through the cap layer... for modulating the potential in the vicinity of the 2DEG channel
Implementation Method 2
two dimensional electron gas (hereinafter abbreviated it as 2DEG) appearing at the interface between epitaxially grown AlxGa1-xN and GaN
Implementation Method 3
AlxGa1-xN/Ga1-yInyN heterojunction... large bandgap of GaN
Data Source
AI summary
A semiconductor device includes: a first semiconductor layer which is made of a first group III nitride semiconductor; a cap layer which is formed on the first semiconductor layer, which is made of a second group III nitride semiconductor, and which has an opening for exposing the first semiconductor layer; and a source electrode and a drain electrode which are formed on the cap layer so as to oppose to each other with the opening interposed. A gate electrode is formed on the bottom face of the opening with an insulating film interposed. The insulating film is formed on at least a part of the first semiconductor layer which is exposed through the opening.