Guest Return Address Stack Emulation for Speculative Execution

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Solution Overview

Problem

In emulated microprocessor architectures, the Conversion Lookaside Buffer (CLB) becomes inefficiently flooded with entries for function returns, leading to a waste of precious resources due to the need for multiple mappings for each function call from different locations in the guest code.

Innovation Solution

A Guest Return Address Stack (GRAS) is implemented in hardware at the front end of the processor pipeline to cache both guest and native addresses for function returns, using a linked-list structure to prevent corruption and conserve CLB space by predicting function return targets.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the Conversion Lookaside Buffer (CLB) is used to cache address mappings for function returns, then the processor can rapidly translate guest instructions into native instructions, but the CLB becomes flooded with multiple entries for the same function called from different locations, wasting precious resources

Engineering Contradiction:
Improveinstruction translation speedVSAvoidCLB entry consumption
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

The invention segments the address mapping cache into two separate structures: the Conversion Lookaside Buffer (CLB) for general address translations and the Guest Return Address Stack (GRAS) specifically for function return predictions. This segmentation allows the GRAS to handle function return cases independently, preventing CLB flooding while maintaining fast translation for both general and return address cases.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The GRAS acts as an intermediary structure between the guest code and the CLB. When a function return is predicted, the GRAS provides the return address directly, serving as a mediator that prevents the need to create multiple CLB entries for the same function. This intermediary role reduces CLB entry consumption while maintaining fast return address resolution.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If a new mapping is created in the CLB for each function return from different call sites, then accurate return addresses are provided, but the CLB resource is wasted due to redundant entries for the same function

Engineering Contradiction:
Improvereturn address accuracyVSAvoidCLB resource waste
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The GRAS performs preliminary action by predicting function return addresses before actual returns occur. When a function is called, the return address is pushed onto the GRAS stack. Upon function return, the predicted address is immediately available from the GRAS, eliminating the need to create redundant CLB entries and ensuring accurate return addresses are provided in advance.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention changes the parameter of address mapping storage by introducing a new data structure (GRAS) with different organizational parameters than the CLB. The GRAS uses a stack-based LIFO (Last In, First Out) structure optimized for function call/return patterns, whereas the CLB uses a conventional cache structure. This parameter change allows efficient handling of return addresses without consuming CLB resources.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If the CLB is used to handle all address mappings including function returns, then a unified cache structure is maintained, but the precision of return address prediction is reduced due to CLB flooding

Engineering Contradiction:
Improvecache structure simplicityVSAvoidreturn address prediction accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The invention segments the address mapping functionality into two specialized structures: the CLB for general address translations and the GRAS for function return predictions. This segmentation allows each structure to be optimized for its specific purpose, with the GRAS providing high-precision return address prediction without being affected by CLB flooding, while maintaining relatively simple individual structures.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10810014B2Method and apparatus for guest return address stack emulation supporting speculation
Publication Date: 2020.10.20 INTEL CORP
  • US10810014B2 patent drawing
  • US10810014B2 patent drawing
  • US10810014B2 patent drawing

AI summary

A microprocessor implemented method of speculatively maintaining a guest return address stack (GRAS) in a fetch stage of a microprocessor pipeline. The method includes mapping instructions in a guest address space to corresponding instructions in a native address space. For each of one or more function calls made in the native address space, performing the following: (a) pushing a current entry into the GRAS responsive to the function call, where the current entry includes a guest target return address and a corresponding native target return address associated with the function call; (b) popping the current entry from the GRAS responsive to processing a return instruction; (c) comparing the current entry with an entry popped from a return address stack (RAS) maintained at a later stage of the pipeline; and (d) responsive to a mismatch, fetching instructions from the return address in the entry popped from the RAS.