Half-Bridge Driver Circuit Slew-Rate Control
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Solution Overview
Problem
Existing half-bridge driver circuits for inverting buck-boost converters face challenges in effectively controlling the slew-rate of high-frequency switching nodes, leading to electromagnetic interference (EMI) issues, particularly when using PMOS transistors which are less optimized and require over-design, increasing noise and complexity.
Innovation Solution
A half-bridge driver circuit architecture that uses n-channel FETs for both high-side and low-side switches, with a bootstrap capacitor and voltage regulator to provide a stable supply voltage for the driver circuits, allowing for slew-rate control of the high-side transistor and reducing EMI by maintaining a constant floating rail voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If PMOS transistors are used for high-side switches, then the circuit can be simplified, but the transistor performance is less optimized and requires over-design, increasing noise and complexity
Solution Approach 1:
The patent inverts the conventional approach by using NMOS transistors instead of PMOS for the high-side switch. This inversion allows the use of n-channel FETs for both high-side and low-side switches, which are better optimized and have superior performance characteristics, thereby reducing noise while maintaining circuit simplicity through unified device architecture
Solution Approach 2:
The patent changes the key parameter of transistor type from PMOS to NMOS for the high-side switch. This parameter change enables better optimized transistor performance, reduces the need for over-design, and consequently lowers noise generation while maintaining the required switching functionality
2Object-generated harmful factors
If slew-rate control is implemented to reduce EMI, then electromagnetic interference is mitigated, but the switching speed is reduced
Solution Approach 1:
The patent implements dynamic slew-rate control that adapts to different operating conditions. The circuit can adjust the switching speed dynamically, allowing faster switching when EMI is less critical and slower switching when EMI mitigation is prioritized, thus resolving the contradiction between EMI reduction and switching speed
Solution Approach 2:
The patent changes the slew-rate parameter dynamically based on operating conditions. By adjusting this parameter, the circuit can optimize the trade-off between EMI emission and switching speed, achieving reduced EMI without permanently sacrificing switching performance
3Object-generated harmful factors
If n-channel FETs are used for both high-side and low-side switches, then transistor performance is optimized and noise is reduced, but the circuit requires more complex driver control
Solution Approach 1:
The patent applies universality by using the same n-channel FET architecture for both high-side and low-side switches. This unified approach simplifies the overall design despite the increased driver control requirements, as the same device characteristics and design rules apply throughout the circuit, reducing design complexity in other areas
4Stability of the object's composition
If bootstrap capacitor and voltage regulator are added to provide stable supply voltage, then slew-rate control is improved, but the device complexity increases
Solution Approach 1:
The patent introduces a bootstrap capacitor and voltage regulator as intermediary components that stabilize the supply voltage to the driver circuits. These intermediaries ensure consistent slew-rate control by providing a stable reference voltage, thereby improving control precision while adding minimal complexity through well-established circuit blocks
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables effective slew-rate control of the switching node in all operating conditions, including continuous and discontinuous conduction modes, while reducing noise and complexity, and optimizing the performance of the driver circuits by using NMOS transistors for both switches.
Implementation Method 1
with a bootstrap capacitor and voltage regulator to provide a stable supply voltage for the driver circuits, allowing for slew-rate control of the high-side transistor and reducing EMI by maintaining a constant floating rail voltage
Implementation Method 2
A half-bridge driver circuit architecture that uses n-channel FETs for both high-side and low-side switches
Data Source
AI summary
First and second n-channel FETs are connected in series between first and second terminals with an intermediate switching node. First and second driver circuits drive gates of the first and second n-channel FETs, respectively, in response to drive signals. The first driver circuit does not implement slew-rate control. A first resistor and capacitor are connected in series between the output of the first driver circuit and an intermediate node. A first electronic switch is connected between the intermediate node and the first terminal. A second electronic switch is connected between the intermediate node and the gate terminal of the first n-channel FET. A second resistor and a third electronic switch are connected in series between the gate terminal of the first n-channel FET and the switching node. A control circuit generates the drive signals and a first, second and third control signal for the first, second and third electronic switch.