Half-Bridge Module Layout With Insulated Pads for Low-Inductance Switching

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Solution Overview

Problem

Existing technologies face challenges in interconnecting high-power transistors to form half-bridges with low-induction circuits to effectively utilize fast-switching transistors like SiC transistors, requiring efficient signal transit times and reliable switching.

Innovation Solution

A half-bridge module design with a conductor path layer divided into strips and insulated terminal pads, allowing parallel supply lines to be connected directly to the conductor path layer, routed in a manner that minimizes inductance and interference, and symmetrically connects transistors for low-inductance and low-interference operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional interconnection methods are used for high-power transistors, then manufacturing is simpler, but inductance increases and switching performance deteriorates

Engineering Contradiction:
Improveswitching reliabilityVSAvoidcircuit layout complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The conductor path layer is segmented into multiple strips (first strip portion, intermediate portion, second strip portion) that are geometrically divided but electrically connected. This segmentation allows independent routing of supply lines while maintaining low inductance through optimized geometric arrangement rather than complex 3D structures.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from conventional 3D stacked interconnections to a 2D planar arrangement where supply lines are routed in parallel along the conductor path layer. This dimensional change simplifies manufacturing while achieving low inductance through careful spacing and parallel routing geometry.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Speed

If supply lines are routed close together to reduce inductance, then switching performance improves, but electromagnetic interference increases

Engineering Contradiction:
Improvesignal transit timeVSAvoidelectromagnetic interference
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The intermediate portion of the conductor path layer provides localized electrical insulation between the first and second strip portions. This allows supply lines to be routed in close parallel proximity for low inductance while the insulated intermediate section prevents electromagnetic coupling and interference between adjacent lines.

Inventive Principle:
Principle #3Local quality

3Ease of manufacture

If terminal pads are directly connected to the conductor path layer, then manufacturing is simplified, but electrical insulation becomes more difficult

Engineering Contradiction:
Improveassembly easeVSAvoidelectrical insulation
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The terminal pads are directly integrated into the conductor path layer, merging the terminal function with the conductor layer itself. This eliminates separate terminal pad structures and simplifies manufacturing, while the insulated intermediate portion provides the necessary electrical isolation between different potential regions.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20250364392A1Half-bridge module having parallel supply lines connected to insulated terminal pads between two strip portions and to one of the strip portions of a conductor path layer
Publication Date: 2025.11.27 VITESCO TECHNOLOGIES GMBH
  • US20250364392A1 patent drawing

AI summary

Half-bridge module having parallel supply lines connected to insulated terminal pads between two strip portions and to one of the strip portions of a conductor path layer. A half-bridge module is equipped with a first power supply line, a second power supply line, and with a phase supply line and with a carrier. The carrier has a conductor path layer which has terminal pads in an intermediate portion which is located between a first and a second transistor strip portion of the conductor path layer. The terminal pads are in each case insulated peripherally in the conductor path layer. The first power supply line is connected to the terminal pads and leads away therefrom. The second power supply line is connected to at least one contact point within the second transistor strip portion and leads away therefrom. The phase supply line is connected to at least one contact point within the intermediate portion or the first transistor strip portion and leads away therefrom.