Asymmetrical Half-Bridge Flyback Soft Switching With Voltage Injection
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Solution Overview
Problem
The flyback-derived single-ended asymmetrical half-bridge topology faces performance decay at power levels from 150 W to 300 W due to inefficiencies in traditional half-bridge and full-bridge topologies, particularly in maintaining zero voltage switching and efficiency across large input and output voltage ranges.
Innovation Solution
The implementation of a DC-DC converter with a totem pole configuration, resonant capacitor, and controlled switching elements to achieve zero voltage switching through optimized dead time management and energy injection, ensuring efficient operation across varying power levels by utilizing a resonant circuit with leakage inductance and parasitic capacitance to charge output capacitors sinusoidally.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If traditional half-bridge or full-bridge topologies are used for power levels from 150 W to 300 W, then the converter can operate in this power range, but efficiency decreases and performance decays due to varying dead time and hard switching modes
Solution Approach 1:
The patent employs an asymmetrical half-bridge topology where the upper and lower switching elements have different dead times. The lower switching element has a longer dead time than the upper switching element, creating an asymmetric switching pattern that enables zero voltage switching for both elements while maintaining stable operation across the 150 W to 300 W power range, thereby resolving the efficiency degradation issue
Solution Approach 2:
The patent implements preliminary action by extending the dead time of the lower switching element to ensure that the voltage across both switching elements reaches zero before they are turned on. This preliminary voltage equalization during the extended dead time period prevents hard switching and eliminates switching losses, maintaining high efficiency across the full power range
2Ease of operation
If pulse width modulation is used to control output power in conventional half bridge and full bridge topologies, then power control is achieved, but dead time varies significantly and causes ringing between leakage inductance and parasitic capacitance
Solution Approach 1:
The patent applies asymmetry by assigning different fixed dead times to the upper and lower switching elements. The lower switching element has a longer dead time than the upper one, creating a stable asymmetric switching pattern that eliminates the varying dead time problem associated with PWM control in conventional topologies, thereby preventing ringing and improving stability
Solution Approach 2:
The patent changes the dead time parameter from a varying PWM-dependent value to fixed asymmetric values for each switching element. By setting the lower switching element's dead time to be consistently longer than the upper element's dead time across all operating conditions, the patent stabilizes the switching parameters and eliminates the ringing caused by parameter variations
3Speed
If switching elements turn on in hard switching mode, then the converter can operate at higher frequencies, but switching losses increase and efficiency decreases
Solution Approach 1:
The patent implements preliminary action by extending the dead time to allow the voltage across the switching elements to reach zero before turn-on. This preliminary voltage equalization ensures that both upper and lower switching elements switch at zero voltage, eliminating switching losses while maintaining high switching frequencies for improved converter performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances efficiency and reduces switching losses, eliminates spikes and glitches, and maintains zero voltage switching conditions for the upper switch, improving overall performance and reducing power dissipation across the secondary rectifier.
Implementation Method 1
when the resonant capacitor form a resonant circuit with the leakage inductance of the transformer and a sinusoidal shaped current will flow into secondary winding and rectifier means charging the output capacitor
Implementation Method 2
the magnetizing current at the end of the second dead time period has an amplitude sufficient to charge a parasitic capacitance reflected in the switching node to create zero voltage switching conditions
Data Source
AI summary
Electronic circuitry and a method of operating the same to obtain zero voltage switching on both primary switches in a flyback derived single ended asymmetrical half bridge topology, in all the operating conditions, both in continuous and discontinuous mode operation. Zero voltage switching is accomplished through voltage injection and through a combination of the voltage injection and current injection.