Voltage-based mode switching changes drive resistance to meet switching stress limits while cutting drive circuit loss in power converters.
Output-voltage sensing replaces direct current measurement to set peak magnetization current in DCM and keep flyback converters efficient.
Voltage and current injection enable zero-voltage switching in a flyback-derived asymmetrical half-bridge, cutting losses and ringing across wide ranges.
Staggered phase turn-on timing limits inductor current overshoot during sudden load increases, helping prevent chip overheating.
A laminated flat plate with ferrite legs improves DC bias in slim PFC inductors while keeping power boards thin without using more board area.
Hierarchical phase distribution cuts control-chip pins and wiring while improving current sharing and phase-level fault detection in high-power converters.
A power converter switches drive amplification modes by circuit voltage to satisfy stress limits while reducing drive circuit loss.
By timing capacitor discharge periods instead of sensing tiny shunt voltages, this case detects buck-boost converter overcurrent with lower power use.
Ramp-slope feedback adjusts each converter phase from the prior inductor current sign to reach zero current and improve energy transfer.
Interleaved series-connected transformer and resonant inductor windings cut DC converter winding loss and simplify magnetic assembly.
Adaptive current thresholds let a PFM buck converter deliver higher average current without longer start-up time or larger output ripple.
Variable delay from current-sense thresholds predicts inductor zero current, keeping BCM PFC switch timing stable as rectified voltage changes.
A staged duty-cycle ramp soft-starts a full-bridge resonant converter, limiting hard-off current and reducing switch transistor voltage stress.
Using N staged switch groups, this buck converter raises effective conversion frequency while limiting switching loss, heat, and parasitic resonance.
Alternating two PWM switching sequences redistributes turn-off losses in a dual active bridge converter to balance switch temperature and improve efficiency.
Parallel rectifying circuits with different diode response speeds suppress switching noise and improve auxiliary-coil voltage detection with lower power loss.
Zero-crossing timing and resonant pre-charge enable ZVS/ZCS in flyback switching, cutting loss at higher frequencies.
A flyback controller uses supply-voltage logic and current sensing to recycle leakage inductance energy while preventing auxiliary switch mis-triggering.
Synchronizing switched-capacitor and regulating periods cuts intermediate ripple, avoids voltage glitches, and removes extra capacitor needs.
Floating capacitors and regenerative rectification recover surge energy in a multilevel inverter, cutting switching loss without larger hardware.
A bidirectional TSU replaces bulky VRM output capacitance by sourcing and sinking transient current while preserving steady-state regulation.
PF-angle-based modulation selects freewheeling paths to balance inner and outer switch losses in NPC three-level inverters and reduce thermal stress.
RC-based gate on-time compensation corrects load current errors from signal delay and input-voltage shifts in QR buck converters.
Peak input current sampling adjusts switch timing to cut battery drain and improve current regulation in wireless power supplies.
Pre-turning on the synchronous rectifier during demagnetization pulls the main switch voltage to zero, cutting turn-on loss in switching power supplies.
Hybrid resonance on the primary and secondary sides reshapes rectifier current to cut turn-on loss, ripple, and EMI in flyback conversion.
A common drift region lets GaN HEMT switches replace back-to-back devices, simplifying cycloconverter design and cutting die area.
Multi-mode control regulates a series-resonant bi-directional DC-DC converter across a wide voltage range while avoiding burst-mode ripple and EMI.
Variable inductance with triple-phase-shift control cuts RMS and circulating current in dual active bridge converters while preserving ZVS and near ZCS.
Switching among three modulation schemes lets an isolated multilevel LLC converter widen output voltage range while keeping frequency swing and losses low.
By tuning resonance frequency in an air-coupled transformer, this case measures stator-rotor gap to protect against contact and power loss.
Closed-loop gate control keeps high-side transistor dI/dt small and constant, reducing ringing and EMI in switching converters.
A high-side transistor disconnects the DC bus voltage sensor in LED power supply standby, cutting sensing loss while preserving detection when active.
By excluding the critical output level nearest the reference, this modulation approach enables zero-voltage switching and cuts converter losses.
An auxiliary transformer winding carries cycle-start requests for secondary-side voltage regulation without added isolators, saving PCB space.
An oscillating discharge path rapidly lowers USB PD source capacitor voltage after detachment to suppress arcs during high-voltage power delivery.
Integrated full-bridge and resonant charging removes the external adapter, cutting charging time, volume, and conversion losses.
A converter cuts switching losses by assigning different frequencies to selected power switches and using snubber capacitors to suppress oscillations.
A trench filling layer shields gate charge and extracts minority carriers, helping super junction IGBTs lower Vce and turn-off loss.
Dynamic switching between LLC, DAB, and CLLLC modes helps a bidirectional DC-DC converter avoid low-efficiency zones across wide voltage and power ranges.
Switchable resonant capacitor networks let a multi-phase DC/DC converter hold near-resonant operation while adapting gain for efficient bidirectional power transfer.
SPWM modulation-index control keeps rectifier phase angle constant, improving power factor and startup while cutting switching losses.
Varying port duty cycle below 50% matches voltage and transformer ratios to cut partial-load losses in series resonant converters.
Shapes three-phase input currents to match voltage waveforms, enabling PFC without bulky inductors or a DC link capacitor.
Sampling electrical characteristics across switching frequencies lets a power converter find its efficiency corner and cut power loss.
Programmable valley selection on the secondary side curbs low-load frequency rise in QR flyback converters to maintain efficiency across loads.
An integrated energy-storage circuit compensates switch turn-off delay to improve peak inductor current sampling without external resistors.
A heat conduction column through the buried oxide layer cools the SOI MOSFET active zone, limiting self-heating and drain current loss.
Pulse-counted synchronous rectifier timing helps CrCM boost PFC converters prevent over-current while sustaining higher switching frequencies.
Double-envelope auxiliary buck control compensates load-current mismatch to minimize DC-DC output ripple and keep voltage stable.