Plug-And-Play TSU Circuit for VRM Load Transient Suppression
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Voltage Regulator Modules (VRMs) face challenges in minimizing output capacitance to manage load transients effectively while maintaining steady-state operation and avoiding complex modifications to existing designs.
Innovation Solution
A plug-and-play Transient Suppression Unit (TSU) that uses a silicon-based solution to replace output capacitance, comprising a bi-directional current source and a transient response accelerator, which connects in parallel to the buck converter's output capacitor and error amplifier, respectively, to manage load transients without affecting steady-state operation or the original compensation network.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the output capacitance value is reduced to minimize PCB area, then the PCB area is reduced, but the ability to sustain load transients within defined boundaries deteriorates
Solution Approach 1:
The patent introduces an electronic capacitor circuit as an intermediary device between the VRM output and the load. This electronic capacitor acts as a mediator that provides transient current supplementation without requiring large physical output capacitors on the PCB, thus reducing PCB area while maintaining transient response capability.
Solution Approach 2:
The patent replaces the traditional mechanical/passive output capacitor with an active electronic capacitor circuit that uses switching elements (MOSFETs), inductors, and control logic. This substitution allows the system to achieve transient response performance without relying on large physical capacitance values, thereby reducing PCB area.
2Power
If the output capacitance value is reduced to increase power density, then the power density is increased, but the voltage regulation during load transients deteriorates
Solution Approach 1:
The patent employs a dynamic electronic capacitor circuit that can adjust its effective capacitance value based on operating conditions. The circuit uses control logic to activate switching elements at appropriate times during load transients, providing dynamic current supplementation that maintains voltage regulation while allowing for reduced static output capacitance and higher power density.
Solution Approach 2:
The patent changes the effective capacitance parameter dynamically through the electronic capacitor circuit. By controlling the switching elements, the circuit can provide high effective capacitance during transients while maintaining low average capacitance, thus enabling high power density without sacrificing voltage regulation during load changes.
3Reliability
If auxiliary circuits are added to increase inductor current slew-rate for better transient response, then the transient response is improved, but the device complexity increases
Solution Approach 1:
The patent designs the electronic capacitor circuit to perform multiple functions: it provides transient current supplementation, regulates output voltage, and can operate in conjunction with the existing VRM control loop. This multi-functionality allows the circuit to improve transient response without requiring separate dedicated circuits for each function, thereby limiting the increase in overall device complexity.
4Power
If the output capacitance is reduced to enhance power density, then the power density is enhanced, but the control bandwidth requirements increase
Solution Approach 1:
The electronic capacitor circuit acts as an intermediary that bridges the gap between reduced output capacitance and adequate control bandwidth. By providing additional current during transients, the electronic capacitor reduces the burden on the control loop, allowing for reduced output capacitance (higher power density) without excessively increasing control bandwidth requirements.
Data Source
Figure 1
Figure 2
Figure 3
AI summary
A plug-and-play Transient Suppression Unit (TSU) for Voltage Regulator Modules (VRMs), which comprises a bi-directional current source connected via a high voltage port and a low voltage port of the TSU in parallel to a voltage output of the VRM, adapted to immediately sink or source current supplied to a load; a detection circuit for detecting mismatches between the voltage output of the VRM to a reference steady- state voltage, which comprises a first comparator for detecting a match between the voltage output of the VRM to the reference steady-state voltage; a second comparator for detecting a mismatch between the voltage output of the VRM to a predefined threshold higher than the reference steady-state voltage; a third comparator for detecting a mismatch between the voltage output of the VRM to a predefined threshold lower than the reference steady-state voltage value; a transient response accelerator, connected via a third port of the TSU to the output compensation port of the VRM error amplifier, and adapted to control duty-ratio saturation of the VRM. A loading transient is detected by the third comparator, upon which the VRM's duty ratio is saturated to a maximal value by the transient response accelerator and current is sourced from the current source to the output, until the first comparator detects that the voltage output of the VRM matches the expected steady- state voltage. An unloading transient is detected by the second comparator, upon which the VRM's duty ratio is saturated to a minimal value by the transient response accelerator and current is sunk from the output into the current source, until the first comparator detects that the voltage output of the VRM matches the expected steady-state voltage.