Half Via Hole Structure for Undercut-Free Display Contacts
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Solution Overview
Problem
In the manufacturing of array substrates, via holes or half via holes often result in poor contact and reliability issues due to undercuts, leading to burnout of transparent conductive film layers, especially in high Pixels Per Inch (PPI) displays where pixel pitch is small, causing defects and affecting display quality.
Innovation Solution
A half via hole structure is designed with a spacer layer, passivation layer, insulating layer, and conductive layers, where the spacer layer protects the insulating layer from over-etching, preventing weak points and undercuts, ensuring proper contact and reliability by forming via holes that are larger than the conductive layer width, thus preventing burnout and maintaining display integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If via holes are formed to connect film layers of different levels, then electrical connection between data lines, gate lines, and common electrode lines is achieved, but undercuts occur causing poor contact and burnout of transparent conductive film layers
Solution Approach 1:
An insulating layer is introduced as an intermediary between the via hole and the transparent conductive film layer. This insulating layer prevents the etching process from directly attacking the transparent conductive film, thereby eliminating the undercut phenomenon while maintaining electrical connection through the via hole structure.
Solution Approach 2:
The insulating layer is formed in advance before the via hole etching process. This preliminary action creates a protective barrier that prevents undercut formation during subsequent etching operations, ensuring the transparent conductive film remains intact and maintains good contact.
2Ease of manufacture
If the transparent conductive film layer is positioned at the via hole undercut, then via hole formation is achieved, but the transparent conductive film layer becomes prone to breakage and burnout
Solution Approach 1:
The insulating layer serves as a protective intermediary that shields the transparent conductive film from direct exposure to the etching process. This prevents the formation of weak points and maintains the structural integrity and strength of the film layer throughout manufacturing.
Solution Approach 2:
The insulating layer is deposited beforehand to provide a cushioning protective layer that absorbs the mechanical and chemical stress during via hole formation. This prevents direct damage to the transparent conductive film, eliminating breakage and burnout risks.
3Reliability
If via holes are formed in the passivation layer, then electrical connection between different levels is achieved, but the transparent conductive film layer is easy to be burnt and has low reliability
Solution Approach 1:
The insulating layer acts as a protective intermediary between the via hole etching process and the transparent conductive film. This barrier prevents direct contact between the etching chemistry and the conductive film, eliminating burnout and ensuring high reliability throughout the manufacturing process.
Solution Approach 2:
The insulating layer is formed in advance to establish a protective barrier before any etching operations occur. This preliminary protection ensures the transparent conductive film cannot be burnt or damaged during subsequent via hole formation and reliability testing processes.
Data Source
AI summary
A half via hole structure, a method for manufacturing the same, an array substrate, and a display panel are provided. The half via hole structure includes: a spacer layer arranged on an underlaying substrate; a passivation layer arranged on the spacer layer and provided with a first via hole, an orthographic projection of the first via hole on the underlaying substrate being within that of the spacer layer on the underlaying substrate; a first conductive layer arranged on the spacer layer and having a width smaller than a diameter of the first via hole; an insulating layer arranged between the spacer layer and the passivation layer and provided with a second via hole; and a second conductive layer arranged on the passivation layer and overlapped with the first conductive layer through the first via hole.