Hall Sensor Comparator With Internal Hysteresis and Low Die Size
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Solution Overview
Problem
Conventional digital output Hall sensors face challenges in achieving small die size, low power consumption, and competitive magnetic specifications while maintaining supply voltage rejection and temperature compensation, driven by commercial market pricing and die size constraints.
Innovation Solution
The implementation of new comparator circuitry with internal positive feedback and current-mirror loads provides differential output signals, eliminating the need for Schmitt triggers and feedback loops, and includes advanced temperature compensation and supply voltage rejection circuitry, resulting in reduced power requirements and die size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional Schmitt triggers or feedback loops are used to provide hysteresis in digital output Hall sensors, then reliable binary state conversion is achieved, but die size and circuit complexity increase
Solution Approach 1:
The patent combines the hysteresis function and binary state conversion into a single comparator circuit with internal positive feedback. The comparator directly converts the analog Hall element output to binary states while internally generating the necessary hysteresis, eliminating the need for separate Schmitt trigger stages or external feedback loops. This integration reduces circuit complexity and die size while maintaining reliable binary state conversion.
Solution Approach 2:
The patent implements internal positive feedback within the comparator circuit itself, where the output of the differential amplifier is fed back to its inputs through the comparator's inherent feedback mechanism. This internal feedback generates the required hysteresis effect, allowing the circuit to maintain stable binary states without requiring external feedback components or additional circuitry.
2Reliability
If precision on-chip voltage regulation is implemented to provide stable bias, then supply voltage rejection and temperature compensation improve, but die size and power consumption increase
Solution Approach 1:
The patent uses a simplified voltage regulation approach that changes the operating parameters of the Hall element and comparator to be less sensitive to supply voltage variations. Instead of implementing precision voltage regulation, the circuit is designed to operate effectively across a range of supply voltages by adjusting bias currents and threshold levels, thereby achieving supply voltage rejection with lower power consumption and reduced die size.
3Device complexity
If simplified comparator circuitry is used to reduce die size, then power consumption and cost decrease, but temperature compensation and supply voltage rejection may be compromised
Solution Approach 1:
The patent designs the comparator circuit to perform multiple functions simultaneously: it converts the analog Hall output to binary states, provides hysteresis for noise immunity, and compensates for temperature variations and supply voltage changes all within a single integrated circuit. The differential amplifier and comparator stages are configured to inherently compensate for environmental variations, eliminating the need for separate compensation circuits and reducing overall die size.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach lowers power consumption, reduces die size, and decreases the cost of the sensor while maintaining high magnetic specifications, achieving latching performance and stability over a wide temperature and voltage range.
Implementation Method 1
When a current-carrying conductor or semiconducting Hall element is placed into a magnetic field, a voltage will be generated orthogonal to the direction of both the current and the magnetic field. This principle is known as the Hall effect.
Data Source
AI summary
A digital output sensor (110) includes a sensing structure (105) including at least one sensing element. The sensing structure (105) outputs a differential sensing signal (106, 107). An integrated circuit (100) includes a substrate (101) including signal conditioning circuitry for conditioning the sensing signal (106, 107). The signal conditioning circuitry includes a differential amplifier (115) coupled to receive the sensing signal and provide first and second differential outputs (116, 117), and a comparator (120) having input transistors (Q27, Q28) coupled to receive outputs from the differential amplifier. The comparator (120) also includes first and second current-mirror loads (Q19/Q21 and Q22/Q20) coupled to the input transistors (Q27, Q28) in a cross coupled configuration to provide hysteresis, wherein the first and second current-mirror loads provide differential drive currents (121,122). An output driver (125) is coupled to receive the differential drive currents (121, 122). An output stage (130) includes at least one output transistor which is coupled to the output driver for providing a digital output for the sensor. A voltage regulator (140) is coupled to receive a supply voltage (VS) and output at least one regulated supply voltage (VREG), wherein the regulated supply voltage is coupled to the sensing structure (105), the differential amplifier (115) and the comparator (120).