Hardware Circuit Average Pooling via Identity Matrix Convolution
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Solution Overview
Problem
Special-purpose hardware circuits cannot directly process neural networks with average pooling layers, leading to processing delays due to the need for off-chip computation.
Innovation Solution
A hardware circuit generates an output tensor equivalent to an average pooling neural network layer by performing convolution with a kernel composed of identity matrices and rescaling operations, allowing for efficient processing without modifying the hardware architecture.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If average pooling layers are processed using conventional hardware circuits, then processing delays occur due to off-chip computation, but the hardware architecture cannot be modified to directly support average pooling operations
Solution Approach 1:
The patent transforms the average pooling operation into equivalent convolution operations by changing the mathematical parameters and representation. Specifically, it uses the identity: avg_pool(x) = conv(x, kernel) where kernel elements are 1/N (N being the number of elements in the pooling window). This parameter transformation allows the hardware to perform convolution instead of average pooling, eliminating processing delays while maintaining architectural constraints.
Solution Approach 2:
The patent introduces an intermediary computational approach by breaking down the average pooling operation into convolution operations with specially designed kernels. The intermediary step involves computing convolutions with kernels containing 1/N values, which mathematically equivalent to average pooling but can be executed by existing convolution hardware, thus avoiding off-chip computation delays.
2Productivity
If convolution operations with identity matrix kernels are performed to generate equivalent output, then processing efficiency is improved, but computational complexity increases due to additional rescaling operations
Solution Approach 1:
The patent merges the average pooling operation with convolution operations by combining them into a single computational pass. Instead of performing separate average pooling and convolution operations, the method directly performs convolution with 1/N kernels, merging two operations into one and reducing overall computational complexity while maintaining processing efficiency.
Solution Approach 2:
The patent changes the kernel parameters from traditional identity matrices to 1/N values, where N is the number of elements in the pooling window. This parameter change simplifies the computational process by eliminating the need for separate rescaling operations, as the 1/N values are directly incorporated into the convolution kernel, thereby reducing device complexity while maintaining efficiency.
Data Source
AI summary
Methods and systems for receiving a request to implement a neural network comprising an average pooling layer on a hardware circuit, and in response, generating instructions that when executed by the hardware circuit, cause the hardware circuit to, during processing of a network input by the neural network, generate a layer output tensor that is equivalent to an output of the average pooling neural network layer by performing a convolution of an input tensor to the average pooling neural network layer and a kernel with a size equal to a window of the average pooling neural network layer and composed of elements that are each an identity matrix to generate a first tensor, and performing operations to cause each element of the first tensor to be divided by a number of elements in the window of the average pooling neural network layer to generate an initial output tensor.