Hardware Bad Block Management for Nonvolatile Memory
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Solution Overview
Problem
Conventional software-based defective memory block management in non-volatile memory devices is prone to data loss and complexity, as defect lists are stored in volatile memory and can become defective, leading to overhead and reduced usable memory.
Innovation Solution
Implementing a hardware-based bad block management system with dedicated bits to indicate defective memory blocks, stored in a separate and more reliable storage location, preventing access to defective blocks and ensuring data integrity by using these bits to manage and map out defective blocks from the logical memory address space.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If software-based defect management is used, then flexibility in managing defective blocks is improved, but system complexity and risk of data loss increase
Solution Approach 1:
The patent introduces a hardware-based defect management system that acts as an intermediary between the memory blocks and the software. This hardware system includes defect status bits stored in dedicated storage locations and control logic that automatically manages defective blocks, thereby reducing software complexity while maintaining management flexibility.
Solution Approach 2:
The patent replaces the software-based defect management mechanism with a hardware-based mechanism. The hardware system uses dedicated storage locations and control logic to automatically track and manage defective blocks, eliminating the need for software to manually track defect lists and reducing the risk of data loss.
2Ease of manufacture
If defect list is stored in volatile memory, then ease of writing and updating is improved, but reliability and data persistence worsen
Solution Approach 1:
The patent segments the memory system into different functional areas: volatile memory for data storage, and dedicated non-volatile storage locations for defect status bits. This segmentation allows the defect list to be persistently stored in a reliable location while maintaining the ability to update defect status when needed.
Solution Approach 2:
The patent introduces dedicated storage locations as an intermediary between the volatile memory and the defect management system. These storage locations provide persistent storage for defect status bits, ensuring that defect information is preserved across power cycles while maintaining reliable defect tracking.
3Reliability
If multiple copies of defect list are stored, then reliability is improved, but usable memory capacity decreases
Solution Approach 1:
The patent extracts the defect status information from the main memory array and stores it in dedicated storage locations. This extraction eliminates the need to store multiple copies of the defect list in the usable memory, as the hardware-based defect management system maintains a single, reliable record of defective blocks.
Solution Approach 2:
The patent introduces dedicated storage locations as an intermediary that holds defect status bits separately from the main memory array. This intermediary storage mechanism provides reliable defect tracking without consuming usable memory capacity, as these storage locations are distinct from the user-addressable memory space.
4Ease of manufacture
If defect list is stored in memory blocks, then ease of storage is improved, but risk of data loss increases due to block defects
Solution Approach 1:
The patent segments the storage function by creating dedicated storage locations separate from the memory blocks. This segmentation ensures that defect status information is stored in a location that is not subject to the same defects as the memory blocks, thereby eliminating the risk of losing the defect list due to block failures.
Solution Approach 2:
The patent introduces dedicated storage locations as an intermediary between the memory blocks and the defect management system. These storage locations provide a safe, isolated repository for defect status bits that is not vulnerable to memory block defects, ensuring persistent and reliable defect tracking.
Data Source
AI summary
Systems and methods that facilitate bad block management in a memory device that comprises nonvolatile memory are presented. One or more memory blocks of a memory device are each associated with one or more additional, dedicated bits that facilitate indicating whether the associated memory block is defective. These additional bits, called bad block bits, can be stored in a hardware-based storage mechanism within the memory device. Once a defect is detected in a memory block, at least one of the associated bad block bits can be set to indicate that the memory block is defective. If at least one of the bad block bits associated with a memory block indicates a memory block is defective, access to the memory block can be prevented.