Hash Table Mask Length Computation for Longest Prefix Match Caching
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Solution Overview
Problem
Modern internet routers face bottlenecks in routing throughput due to complex and costly circuitry required for searching destination IP addresses in routing tables, particularly with the increasing demand for reduced latency and high internet traffic, where existing caching solutions like TCAM and LPM algorithms are expensive and impractical for large-scale implementation.
Innovation Solution
A method involving a hash table with a mask length that masks destination addresses to access cache entries, allowing for efficient retrieval of routing information by determining identical most significant bits and dynamically updating the mask length to optimize cache performance, reducing the need for complex circuitry and increasing cache hit rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If TCAM with hardware-based LPM matching method is used, then routing lookup speed is improved, but device cost and complexity increase
Solution Approach 1:
The patent creates a simplified copy of the routing table in cache memory that stores only the necessary routing information without the complex LPM matching structure. This copy enables fast lookup through simple comparison operations rather than hardware-based LPM algorithms, reducing device complexity while maintaining routing functionality
Solution Approach 2:
The patent uses standard cache memory (SRAM/DRAM) instead of expensive TCAM resources for routing lookup. By storing routing information in readily available cache memory and using simple matching algorithms, the system achieves fast routing without the high cost and complexity of TCAM hardware
2Productivity
If LPM algorithm is implemented in hardware, then routing throughput is improved, but power consumption and heat dissipation increase
Solution Approach 1:
The patent extracts the essential routing information from the full routing table and stores it in cache memory. This extraction allows the system to perform routing lookups using simple cache access operations rather than power-intensive hardware LPM algorithms, reducing power consumption while maintaining routing throughput
Solution Approach 2:
The patent changes the parameters of the routing data structure by storing only the necessary fields (destination network address and routing information) in cache memory, excluding redundant information. This parameter optimization enables faster, lower-power lookup operations while maintaining routing accuracy
3Ease of manufacture
If exact match caching is used, then cache implementation is simplified, but cache coverage is limited
Solution Approach 1:
The patent makes the cache entry structure universal by designing it to handle both exact matches and prefix matches through the same data format. The cache entry stores destination network address with variable length prefix information, allowing the same cache structure to serve multiple matching scenarios without requiring separate implementations
4Quantity of substance
If mask length is increased to cover more prefixes, then cache coverage is improved, but memory requirements increase
Solution Approach 1:
The patent applies partial action by storing only the essential prefix information needed for routing decisions in cache memory, rather than storing complete routing table entries. By caching only the destination network address prefix and associated routing information with variable length masks, the system achieves sufficient cache coverage without proportionally increasing memory requirements
Data Source
AI summary
A data packet is received in a network element. The network element has a cache memory in which cache entries represent a portion of addresses stored in a main memory, The destination address and the cache entries each comprise a binary number. A hash function is applied to the masked destination address to access a hash table. When the number of most significant bits corresponding to the value in the hash table in one of the cache entries and in the destination address are identical, routing information for the packet is retrieved from the cache entry.