Heterojunction Bipolar Transistor Integration via Selective SiGe Epitaxy
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Solution Overview
Problem
Integration of heterojunction bipolar transistors (HBTs) with advanced CMOS technologies beyond 28 nm is challenging due to height limitations and complex, costly processes.
Innovation Solution
A method involving selective epitaxial growth of a SiGe film in a recess formed between isolation trenches on a silicon substrate, with a buried collector and emitter structure, reducing the overall height of the HBT device and simplifying the integration process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If HBTs are integrated with advanced CMOS technologies (28 nm or beyond), then device integration capability is improved, but device height constraint is violated or process complexity increases
Solution Approach 1:
The patent transitions from planar HBT structures to vertically-integrated structures where the HBT is formed within a recess in the CMOS substrate. This dimensional change allows the HBT to be embedded in the third dimension (depth), reducing the overall footprint and enabling better integration with advanced CMOS nodes while maintaining electrical performance.
Solution Approach 2:
The HBT structure is nested within the CMOS device structure by forming the HBT in a recess of the substrate. The collector region extends into the recess, the base is formed at a higher level, and the emitter sits on top, creating a nested vertical configuration that integrates two device types in a compact arrangement.
2Adaptability or versatility
If HBTs are integrated with advanced CMOS technologies, then device integration capability is improved, but process complexity and cost increase
Solution Approach 1:
The patent merges the HBT fabrication process with the CMOS fabrication process by using the same substrate and integrating formation steps. The recess formation, selective epitaxial growth for the collector and base, and emitter formation are combined with standard CMOS工艺流程, reducing the number of separate process modules and simplifying overall manufacturing.
Solution Approach 2:
The recess structure serves multiple functions: it provides the collection region for the HBT, defines the vertical positioning for base and emitter formation, and enables electrical isolation. This multi-functionality reduces the need for additional specialized structures and process steps, thereby simplifying the overall process.
3Manufacturing precision
If selective epitaxial growth is used to form the base in a recess, then manufacturing precision is improved, but device height is reduced
Solution Approach 1:
Selective epitaxial growth is used to form the base region with precise local control of material composition and thickness. The growth occurs only in the recess area with specific crystal orientation and doping conditions, enabling high manufacturing precision for the base-collector junction while maintaining a compact vertical profile.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the integration of HBTs with advanced CMOS technologies while reducing the device height and fabrication complexity, thereby improving the efficiency and cost-effectiveness of the process.
Implementation Method 1
forming a base of a heterojunction bipolar transistor by selective epitaxial growth of a film comprising SiGe in the recess
Data Source
AI summary
The present disclosure is directed to a method that includes exposing a surface of a silicon substrate in a first region between first and second isolation trenches, etching the silicon substrate in the first region to form a recess between the first and second isolation trenches, and forming a base of a heterojunction bipolar transistor by selective epitaxial growth of a film comprising SiGe in the recess.