High-Electron-Mobility Component Layout for Lower On-State Resistance
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Solution Overview
Problem
High electron mobility components, such as transistors and diodes, face challenges in reducing the resistance and surface area of their conductor networks, leading to increased bulk and on-state resistance.
Innovation Solution
The design incorporates electrode connection tracks that are parallel to each other, with current collecting regions extending on both sides of a separation between them, where the separation is oblique to the tracks and the edges are orthogonal, allowing for a compromise between surface area and resistance by optimizing the layout of metal regions and vias to reduce electrical resistance and surface occupation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional conductor network layouts are used, then the component can be manufactured with standard designs, but the electrical resistance and surface area are increased
Solution Approach 1:
The conductor network is segmented into multiple parallel connection tracks that extend from the connection pads to the active areas. This segmentation allows current to flow through multiple paths simultaneously, reducing the overall electrical resistance while maintaining a compact surface footprint.
Solution Approach 2:
The connection tracks are arranged in a planar configuration on the chip surface, utilizing two-dimensional space efficiently. The tracks extend in specific directions to optimize the path length and reduce resistance without increasing the overall component footprint, effectively using dimensional arrangement to resolve the contradiction.
2Area of stationary object
If the conductor network surface area is reduced, then the component size is minimized, but the electrical resistance increases
Solution Approach 1:
Multiple connection tracks are merged into a unified conductor network structure that shares common pathways. The parallel tracks are positioned to maximize overlapping coverage of the active areas, allowing the network to achieve low resistance through combined current paths while minimizing the total surface area occupied.
Solution Approach 2:
The conductor network exhibits local quality variations where tracks are densely packed in regions requiring high current capacity and spaced differently in other areas. The track density and dimensions are locally optimized to reduce resistance in critical paths without unnecessarily increasing the overall surface area.
Data Source
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AI summary
The present description relates to a component (100) of the type with high electron mobility, wherein: tracks (144, 146) for connecting electrodes are mutually parallel; on the tracks, at least one pair (160) of current-collecting regions (164, 166) extends on either side of a separation (168) between the regions as far as two opposite edges (165, 167) of the regions; and the separation is oblique relative to the tracks and the two opposite edges are orthogonal to the tracks.