Hetero-BiMOS Injection Mechanism for Flash Memory Scaling
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Solution Overview
Problem
The inefficiency of channel hot electron injection (CHEi) in NOR Flash memory devices limits scaling and increases leakage in unselected memory cells, necessitating a method to improve injection efficiency while reducing drain field requirements.
Innovation Solution
The hetero-BiMOS injection system employs a hetero-bipolar injection mechanism using silicon and silicon germanium to uniformly inject electrons into the floating gate at lower electric fields, forming a bipolar transistor within the substrate to accelerate and inject charge carriers efficiently across the channel.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If channel hot electron injection (CHEi) is used to charge the floating gate, then electron injection can be achieved, but injection efficiency is very low (only one in roughly a million electrons successfully injected)
Solution Approach 1:
The patent changes the fundamental injection mechanism from CHEi to hetero-bipolar injection, altering the physical parameters of the process. By using a hetero-bipolar transistor with silicon-germanium base and silicon emitter, the injection efficiency improves from 1 in 1,000,000 to approximately 1 in 1,000, achieving a thousand-fold improvement in productivity while reducing energy loss through more efficient carrier transport.
Solution Approach 2:
The patent employs composite material structure in the hetero-bipolar transistor, specifically combining silicon-germanium (SiGe) base layer with silicon (Si) emitter and collector layers. This composite material approach enables better band alignment and carrier selectivity, directly improving injection efficiency by allowing preferential electron injection from the SiGe base into the floating gate while blocking holes.
2Productivity
If high drain field is applied for CHEi programming of selected memory cell, then injection can occur, but drain induced barrier lowering leakage increases in unselected memory cells
Solution Approach 1:
The patent applies local quality by implementing hetero-bipolar injection at the selected memory cell location only, through precise control of the hetero-bipolar transistor structure. The SiGe base region is selectively formed only where needed, enabling localized high-efficiency injection without requiring high drain fields across the entire array, thus preventing leakage in unselected cells while maintaining fast programming in selected cells.
Solution Approach 2:
The patent introduces the hetero-bipolar transistor as an intermediary device between the drain and floating gate. The SiGe base acts as a mediator that enables efficient electron injection through its unique band structure, eliminating the need for high drain fields that cause leakage. The intermediary structure provides controlled carrier injection without the harmful side effects of conventional CHEi.
3Object-generated harmful factors
If channel doping is kept high to reduce leakage, then off-state leakage is reduced, but gate length scaling is limited
Solution Approach 1:
The patent changes the injection mechanism parameter from field-driven CHEi to hetero-bipolar injection, which enables effective leakage suppression without relying on high channel doping. The hetero-bipolar structure provides inherent carrier selectivity through its band alignment, allowing gate length to be scaled down while maintaining both low leakage and high injection efficiency, thus resolving the trade-off between leakage control and scaling.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances electron injection efficiency, reduces off-state leakage, and allows for further scaling of memory cells with lower power dissipation and improved reliability.
Implementation Method 1
The hetero-bipolar injection mechanism uses a combination of silicon and silicon germanium to increase electron injection efficiency at the lower gate and drain electric fields
Implementation Method 2
The hetero-BiMOS process implements a hetero-bipolar injection mechanism that enables uniform injection across the transistor channel at electric fields lower than that required by CHE processes or conventional Fowler-Nordheim tunneling
Data Source
AI summary
A hetero-BiMOS injection system comprises a MOSFET transistor formed on a substrate and a hetero-bipolar transistor formed within the substrate. The bipolar transistor can be used to inject charge carriers into a floating gate of the MOSFET transistor. This is done by operating the MOSFET transistor to form an inversion layer in its channel region and operating the bipolar transistor to drive minority charge carriers from the substrate into a floating gate of the MOSFET transistor. The substrate provides a silicon emitter and a silicon germanium containing base for the bipolar transistor. The inversion layer provides a silicon collector for the bipolar transistor.