Heterogeneous Memory Data Placement via Cost-Based Reliability and Performance Balancing
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Solution Overview
Problem
Computer devices with multiple memory units of varying performance and reliability characteristics face challenges in optimally placing data blocks to balance reliability and performance, as existing methods do not effectively account for the trade-off between these factors.
Innovation Solution
A method is introduced that determines a 'cost' for each memory block/memory unit combination based on access frequency, latency, and architectural vulnerability, selecting the memory unit with the lowest cost for data placement, using a page placement module, FIT rate logger, and architectural vulnerability factor estimator to migrate memory pages between units.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If data is placed in memory units with best performance characteristics (lowest latency), then performance is improved, but reliability deteriorates due to higher vulnerability to faults
Solution Approach 1:
The patent applies local quality by assigning different data blocks to different memory units based on their specific access patterns and reliability requirements. Hot data blocks with frequent access are placed in lower-level memory units (faster but less reliable), while cold data blocks are placed in upper-level memory units (slower but more reliable). This selective placement strategy optimizes the overall system by matching data characteristics with appropriate memory unit qualities.
Solution Approach 2:
The patent dynamically changes the placement parameters of data blocks based on their access frequency (hotness) and other characteristics. The system monitors data access patterns and repositions data blocks between memory units as their access frequency changes, thereby adapting the reliability-performance balance dynamically rather than using a static placement strategy.
2Reliability
If data is placed in memory units with higher reliability characteristics, then reliability is improved, but performance deteriorates due to increased latency
Solution Approach 1:
The patent applies local quality by assigning different data blocks to different memory units based on their specific access patterns and reliability requirements. Hot data blocks with frequent access are placed in lower-level memory units (faster but less reliable), while cold data blocks are placed in upper-level memory units (slower but more reliable). This selective placement strategy optimizes the overall system by matching data characteristics with appropriate memory unit qualities.
Solution Approach 2:
The patent dynamically changes the placement parameters of data blocks based on their access frequency (hotness) and other characteristics. The system monitors data access patterns and repositions data blocks between memory units as their access frequency changes, thereby adapting the reliability-performance balance dynamically rather than using a static placement strategy.
3Reliability
If data blocks are frequently migrated between memory units to optimize placement, then reliability and performance balance is improved, but system complexity increases
Solution Approach 1:
The patent implements self-service by enabling data blocks to effectively migrate themselves based on their access patterns. The migration decisions are made automatically based on monitored access frequency and pre-defined placement policies, without requiring complex external management intervention. This reduces the complexity of data placement management while maintaining optimal reliability-performance balance.
Solution Approach 2:
The patent uses feedback mechanisms by monitoring data access frequency and using this information to make migration decisions. The system continuously observes access patterns and adjusts data placement accordingly, creating a closed-loop control system that automatically optimizes the reliability-performance balance without requiring complex manual management.
Data Source
AI summary
Techniques for selecting one of a plurality of heterogeneous memory units for placement of blocks of data (e.g., memory pages), based on both reliability and performance, are disclosed. A “cost” for each data block/memory unit combination is determined, based on the frequency of access of the data block, the latency of the memory unit, and, optionally, an architectural vulnerability factor (which represents the level of exposure of a particular memory data value to memory faults such as bit flips). A memory unit is selected for the data block for which the determined cost is the lowest, out of all memory units considered, and the data block is placed into that memory unit.