Heterogeneous Processor Data Width Analysis Unit
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Solution Overview
Problem
Conventional processors with uniform data widths are inefficient in terms of semiconductor size and energy consumption when processing data of varying widths, as they require either underutilization of functional units or excessive energy usage.
Innovation Solution
A heterogeneous processor with components that support multiple data widths, including functional units, register files, and connecting wires, uses an analysis unit to determine data widths of operands and connections in a data flow graph, allowing for the selection and execution of appropriate instructions and register allocation based on these determinations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a processor uses uniform data width components, then it can process all data without additional width determination, but it results in underutilization of functional units and increased energy consumption when processing varying data widths
Solution Approach 1:
The patent applies local quality by making processor components (functional units, register files, connecting wires) have heterogeneous data widths matched to the specific data width requirements of each operation. Instead of uniform components, each component is optimized locally to process specific data widths, eliminating energy waste from processing smaller data widths with oversized components.
Solution Approach 2:
The patent implements dynamics by making the processor configuration adaptable through the analysis unit that dynamically determines data widths of operands and connections in the data flow graph. The processor can adjust which functional units and register files are activated based on the actual data width requirements, allowing the system to transition between different operational states efficiently.
2Use of energy by stationary object
If a processor uses heterogeneous components with different data widths, then energy consumption and chip size are reduced, but additional analysis is required to determine appropriate data widths for operands and connections
Solution Approach 1:
The patent applies preliminary action by performing data width determination through fixed-point algorithm analysis during the compilation phase, before code execution. The analysis unit pre-calculates the data widths of all operands and connections in the data flow graph, storing this information for use during runtime, thus avoiding the need for complex runtime decisions.
Solution Approach 2:
The patent introduces an analysis unit as an intermediary between the compiler and the heterogeneous processor. This intermediary component performs the complex task of determining data widths using type information and fixed-point algorithms, translating high-level type information into specific data width assignments for processor components, thereby isolating the complexity from both the compiler and the processor execution.
3Adaptability or versatility
If the processor determines data widths at runtime, then it can adapt to varying data widths, but it increases execution time due to additional analysis requirements
Solution Approach 1:
The patent performs data width determination in advance during the compilation phase using the analysis unit and fixed-point algorithm, storing the results in the generated code or metadata. At runtime, the processor simply uses the pre-determined data widths without performing additional analysis, thus achieving adaptability without runtime overhead.
4Device complexity
If uniform functional units are used for all data widths, then the processor design is simpler, but the semiconductor size and energy consumption increase
Solution Approach 1:
The patent implements local quality by creating heterogeneous functional units with different data widths (e.g., 8-bit, 16-bit, 32-bit, 64-bit units) instead of using oversized uniform units. Each functional unit is sized appropriately for its specific function, reducing the total chip area while maintaining the ability to process various data widths efficiently.
Solution Approach 2:
The patent segments the processor into multiple specialized functional units with different data width capabilities, rather than using a single uniform unit. This segmentation allows the processor to activate only the appropriately-sized units needed for each operation, reducing overall chip area while maintaining design manageability through modular organization.
Data Source
AI summary
Provided are an apparatus and method for providing instructions for a heterogeneous processor having heterogeneous components supporting different data widths. Respective data widths of operands and connections in a data flow graph are determined by using type information of operands. Instructions, to be executed by the heterogeneous processor, are provided based on the determined data widths.