Heterogeneous RF Chip Packaging for Multi-Node Signal Processing
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Solution Overview
Problem
The existing radio frequency communication devices face inefficiencies due to the need for a single semiconductor chip to manufacture RF circuits, analog circuits, and digital circuits with different performance characteristics, leading to reduced overall performance and increased manufacturing costs.
Innovation Solution
The RFIC is divided into separate semiconductor chips for RF circuits and analog circuits, each manufactured in different process nodes, with digital circuits processed separately, allowing for improved performance and cost efficiency by using heterogeneous semiconductor chips packaged together and mounted on a PCB.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If RF circuits, analog circuits, and digital circuits are manufactured on a single semiconductor chip, then device integration is achieved, but manufacturing precision and overall performance deteriorate due to incompatible process nodes
Solution Approach 1:
The RFIC is divided into separate semiconductor chips: a first semiconductor chip for RF circuits manufactured in a first process node, and a second semiconductor chip for analog circuits manufactured in a second process node. This segmentation allows each circuit type to be optimized for its specific manufacturing requirements while maintaining overall system integration through packaging.
2Device complexity
If RF circuits, analog circuits, and digital circuits are manufactured on a single semiconductor chip, then device integration is achieved, but manufacturing costs increase due to incompatible process nodes
Solution Approach 1:
The RFIC is divided into separate semiconductor chips: a first semiconductor chip for RF circuits manufactured in a first process node, and a second semiconductor chip for analog circuits manufactured in a second process node. This segmentation allows each circuit type to be manufactured in the most cost-effective process node, reducing overall manufacturing costs while maintaining integration through heterogeneous packaging.
3Adaptability or versatility
If the number of reception chains is increased to support multimode and various frequency bands, then communication capability is improved, but PCB routing area increases
Solution Approach 1:
The patent transitions from a two-dimensional PCB routing architecture to a three-dimensional stacked architecture. The first and second semiconductor chips are stacked vertically, with signal transmission occurring through TSVs in the vertical dimension rather than through lateral PCB traces. This dimensional change reduces PCB routing area while supporting multiple reception chains for enhanced communication capability.
4Speed
If digital interface is introduced between RFIC and modem, then signal transmission efficiency is improved, but device complexity increases due to coexistence of RF, analog, and digital circuits
Solution Approach 1:
The RFIC is segmented into a first semiconductor chip for RF circuits and a second semiconductor chip for analog circuits, with a digital interface between them. This segmentation allows RF and analog circuits to be optimized for their respective functions while using efficient digital signaling for data transmission, improving signal transmission efficiency without requiring all circuit types to coexist on a single chip.
Data Source
AI summary
A radio frequency communication device may include a first package including a first semiconductor chip, the first semiconductor chip including a reception amplifier configured to receive a radio frequency (RF) signal, amplify the received RF signal, and output the amplified RF signal, a second package including a second semiconductor chip and a third semiconductor chip, the second semiconductor chip including a reception chain configured to receive the amplified RF signal from the first semiconductor chip via at least one first wire on a printed circuit board (PCB), and generate a baseband digital signal, and the third semiconductor chip being configured to receive the baseband digital signal from the second semiconductor chip via an internal transmission of the second package, and process the baseband digital signal, and the PCB on which the first package and the second package are mounted.