HfO2 Ferroelectric Memory with Oxygen Buffer Layer
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Solution Overview
Problem
Current non-volatile ferroelectric memories face challenges in achieving high reliability and write/erase endurance, especially at advanced CMOS process temperatures, while maintaining low power consumption and scalability.
Innovation Solution
A non-volatile ferroelectric storage element is designed with a hafnium oxide-type ferroelectric layer between conductive layers, incorporating a buffer layer of a metal oxide with oxygen ion conductivity and a multiple valency metal to enhance reliability and endurance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional ferroelectric materials like PZT are used, then ferroelectric memory can be implemented, but scaling to 90 nm or smaller is difficult due to size effects and material handleability issues
Solution Approach 1:
The patent changes the material parameter from conventional PZT ferroelectric materials to hafnium oxide-based ferroelectric materials. This parameter change enables scaling to 90 nm and below while maintaining ferroelectric properties, as HfO2 can form stable thin films at these dimensions without the size-effect limitations that plague PZT. The material substitution resolves both the scaling capability and manufacturability issues simultaneously.
2Manufacturing precision
If hafnium oxide ferroelectric films are used for scaling, then micronized scaling to 90 nm and smaller is achieved, but write/erase endurance and reliability remain insufficient
Solution Approach 1:
The patent introduces a buffer layer as an intermediary between the hafnium oxide ferroelectric film and the underlying electrode or substrate. This buffer layer, composed of specific materials with controlled thickness, mediates the interface properties to reduce defect formation and improve oxygen stoichiometry at the interface. Consequently, the write/erase endurance and reliability are enhanced while maintaining the scaled-down film thickness of 90 nm and below.
3Speed
If existing volatile memories like DRAM and SRAM are used, then high speed operation is achieved, but standby power consumption increases due to leakage current
Solution Approach 1:
The patent segments the memory structure into distinct functional layers including the hafnium oxide ferroelectric layer, buffer layers, and conductive electrodes. This segmentation allows the ferroelectric layer to maintain data state without power (non-volatile property) while the thin-film structure and interface engineering preserve fast switching characteristics. The result is a memory device that achieves both high-speed operation and zero standby power consumption by eliminating the need for continuous refresh operations.
4Quantity of substance
If ferroelectric memories are scaled to smaller nodes, then density increases, but difficulty of forming thin films of 100 nm or smaller arises due to size effect
Solution Approach 1:
The patent employs a composite material structure consisting of hafnium oxide as the primary ferroelectric component combined with buffer layers of specific materials. This composite approach allows the formation of stable, defect-free thin films at 100 nm and below because the buffer layers provide structural support and chemical stability that pure HfO2 films lack at such thin dimensions. The composite structure enables high-density scaling while maintaining manufacturability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution significantly improves the write/erase endurance to 1011 cycles or more, reduces leakage current, and allows for low-temperature fabrication, making it suitable for advanced CMOS integration with high reliability and low power consumption.
Implementation Method 1
a buffer layer of a metal oxide having oxygen ion conductivity and containing a metal with a multiple valency
Implementation Method 2
Ferroelectric memories (FeRAM), which use existing materials such as PZT which make use of ferroelectric material polarization reversal as the operating principle of memory
Data Source
AI summary
The invention provides a non-volatile storage element and non-volatile storage device employing a ferroelectric material with low power consumption, excellent high reliability, and especially write/erase endurance, which can be mixed with advanced CMOS logic. The non-volatile storage element has at least a first conductive layer, a second conductive layer, and a ferroelectric layer composed of a metal oxide between both conductive layers, with a buffer layer having oxygen ion conductivity situated between the ferroelectric layer and the first conductive layer and/or second conductive layer. An interface layer composed of a single-layer film or a multilayer film may be also provided between the first conductive layer and the ferroelectric layer, the interface layer as a whole having higher dielectric constant than silicon oxide, and when the buffer layer is present between the first conductive layer and the ferroelectric layer, the interface layer is situated between the first conductive layer and the buffer layer. The non-volatile storage device comprises at least a memory cell array comprising low-power-consumption ferroelectric memory elements formed in a two-dimensional or three-dimensional configuration, and a control circuit. The ferroelectric layer is scalable to 10 nm or smaller and is fabricated at a low temperature of ≤400° C., and is subjected to low temperature thermal annealing treatment at ≤400° C. after the buffer layer has been formed, to provide high reliability.