Hierarchical ECC Memory Encoding for DRAM Error Correction
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Solution Overview
Problem
As semiconductor memory technologies advance and memory density increases, errors in Dynamic Random Access Memory (DRAM) storage become more frequent, necessitating effective error detection and correction mechanisms to maintain performance.
Innovation Solution
A memory system that generates both first and second check codes during encoding, where the first check codes are used for error detection or correction at the byte level and the second check codes are used for error detection or correction across bytes, optimizing hardware efficiency and reducing power consumption by simplifying the circuitry and enhancing encoding speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional ECC techniques are used to detect or correct errors in stored data, then error detection and correction capability is improved, but hardware complexity and power consumption increase
Solution Approach 1:
The patent segments the data into M bytes and generates two types of check codes: first check codes for each byte and second check codes for groups of bytes. This segmentation allows the ECC system to process errors at different granularities, reducing the overall hardware complexity while maintaining comprehensive error detection and correction capability.
Solution Approach 2:
The patent introduces a hierarchical dimension to error checking by creating check codes at two levels: byte-level first check codes and group-level second check codes. This dimensional approach allows the system to efficiently locate and correct errors without requiring a single complex check code covering all data bits.
2Reliability
If traditional ECC techniques are used to detect or correct errors in stored data, then error detection and correction capability is improved, but power consumption increases
Solution Approach 1:
By segmenting the error checking into hierarchical levels (byte-level and group-level), the patent reduces the number of computations required compared to traditional single-level ECC. This segmentation lowers power consumption while maintaining the ability to detect and correct errors across the entire data set.
Solution Approach 2:
The patent applies partial checking by generating first check codes for all bytes and second check codes for selected groups of bytes. This partial approach at different levels provides sufficient error detection and correction capability without requiring exhaustive checking of every possible error combination, thereby reducing power consumption.
3Reliability
If complex encoding circuits are implemented to ensure error detection and correction, then reliability is improved, but encoding speed decreases
Solution Approach 1:
The patent divides the encoding process into segments that can be processed independently and in parallel. First check codes are generated for each byte, and second check codes are generated for groups of bytes, allowing concurrent processing that maintains high encoding speed while ensuring comprehensive error detection and correction.
Solution Approach 2:
The patent performs preliminary generation of first check codes for all bytes before generating the second check codes for groups of bytes. This preliminary action allows the encoding process to proceed in an optimized sequence, improving overall encoding speed without compromising the reliability of error detection and correction.
Data Source
AI summary
Provided is a memory system, which includes: a memory, configured to, during a read or write operation, write or read multiple data, the multiple data are divided into M bytes, each having N data; and an encoding module, configured to generate, at an encoding stage, X first check codes, each based on a subset of the data at fixed bits among all the bytes, and to generate, at the encoding stage, Y second check codes based on all data in a subset of the bytes, the X first check codes are configured for at least one of error detection or error correction on the N data in each of the bytes, and the Y second check codes are configured for at least one of error detection or error correction on the M bytes.