Hierarchical Power Shutdown System for SoC Leakage Control
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Solution Overview
Problem
In semiconductor integrated circuit devices, particularly System-on-a-Chip (SoC) for portable devices, the increased leakage current due to finer manufacturing processes poses challenges in power shutdown management, leading to signal propagation issues, increased signal delay, clock signal distribution difficulties, and data retention problems, especially when multiple independent power domains are involved.
Innovation Solution
The implementation of a hierarchical power shutdown system where priorities are assigned to functional blocks, with integrated relay buffers and clock buffers, and the use of sensor circuits for precise power switch control, along with a dynamic comparator for generating clock signals, helps in minimizing power voltage drop and facilitating high-speed recovery from power shutdown.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If multiple independent power domains are provided inside one chip for selective power shutdown, then leakage current is reduced, but signal propagation prevention design becomes complicated and penetration current issues arise
Solution Approach 1:
A repeater circuit is introduced as an intermediary component between power domains. The repeater receives signals from one power domain and retransmits them to another power domain, acting as a mediator that isolates the signal propagation issues caused by intermediate voltage levels. This allows independent power shutdown control while preventing penetration current from affecting other domains.
Solution Approach 2:
The patent applies different design approaches to different regions of the chip. Each power domain is treated as a separate region with its own power control and signal handling characteristics. The repeater circuits are strategically placed at domain boundaries to provide localized signal regeneration and isolation, rather than applying a uniform design approach across the entire chip.
2Adaptability or versatility
If independent power shutdown control is implemented in multiple power domains, then power management flexibility is improved, but repeater circuits and backup memory must be mounted increasing device complexity
Solution Approach 1:
The repeater circuit is designed to perform multiple functions: it acts as a signal amplifier, a power domain isolator, and a level shifter. By making the repeater multi-functional, the patent reduces the need for separate dedicated circuits for each function, thereby limiting the increase in device complexity while maintaining power management flexibility.
3Loss of energy
If power shutdown is controlled independently in different areas, then leakage current reduction is achieved, but clock signal distribution and data retention become difficult
Solution Approach 1:
The repeater circuits are pre-positioned at strategic locations between power domains before operation. When power shutdown is required, the repeater is already in place to handle signal transmission. Additionally, backup memory circuits are pre-configured to automatically retain data when power is shut down in specific domains, eliminating the need for complex real-time coordination during power management operations.
Data Source
AI summary
A semiconductor integrated circuit device having a control signal system for avoiding failure to check an indefinite signal propagation prevention circuit, for facilitating a check included in an automated tool, and for facilitating a power shutdown control inside a chip. In the semiconductor integrated circuit device, power shutdown priorities are provided by independent power domains (Area A to Area I). A method for preventing a power domain having a lower priority from being turned OFF when a circuit having a high priority is turned ON is also provided.