Power Consumption Reduction TRIZ Cases
- Single Flux Quantum Circuit Biasing Without Static Power Loss
Replacing resistor biasing with a superconducting transformer cuts static power dissipation and cooling load in Josephson junction circuits.
- IC Configuration Context Switcher With Latch-Based Data Retiming
Latch-based retiming and decoding in an IC context switcher keeps configuration data continuous while reducing circuit complexity and power.
- AC-Powered SFQ Transmission Line for Low-Heat Pulse Regeneration
An AC transformer and Josephson junction regenerate SFQ pulses without resistive damping, cutting heat dissipation in superconducting logic.
- Sequential Circuit Output Clamping for Low-Leakage Sleep Modes
A clamp signal forces sequential outputs to low-leakage values in sleep mode while preserving state for fast recovery.
- AC-Powered SFQ Transmission Line for Low-Heat Ballistic Logic
Transformer-coupled AC power and Josephson junction pulse regeneration cut heat dissipation and signal loss in ballistic SFQ logic circuits.
- SRAM Virtual Ground Control for Leakage Reduction and Data Retention
Tracks SRAM cell threshold voltage to hold virtual ground near VDD−1.5Vth, cutting standby leakage while preserving data retention.
- Complementary Security Trace Circuit for Low-Power Active Shielding
Complementary security traces use isolation, charge sharing, and comparators to cancel capacitive coupling and cut active shield power.
- Constant-Hamming-Weight Logic Circuit for Stable Power Use
A decoder-interconnect-encoder logic circuit keeps Hamming weight constant to suppress power fluctuation, heat, and battery drain.
- I2C Bus Level Shifter With Busy-Triggered Low Standby Power
A busy-triggered I2C level shifter cuts standby current and avoids extra reference voltages while switching fast enough for high-speed data.
- Die-to-Die Level Shifting Circuitry for Mixed-Voltage SiP Communication
Die-to-die output circuitry selectively level shifts signals between different internal voltage levels in a system-in-package.
- Hierarchical Power Shutdown System for SoC Leakage Control
A hierarchical power shutdown system manages independent domain priorities to minimize voltage drop and enable rapid data recovery.
- Gate Leakage Reduction in Multi-Power-Domain CMOS Chips
Intermediary logic circuits discharge floating gate voltages before power switches open, reducing leakage currents by up to 20 times.
- Semiconductor Integrated Circuit Power Control via Current Ratio Feedback
A semiconductor integrated circuit adjusts threshold and supply voltages by monitoring switching and leakage currents to minimize operational power.
- Antifuse Leakage Reduction via Sleep Mode Decoupling
Sleep mode control logic decouples unprogrammed antifuses from input signals, eliminating cumulative leakage currents during low-power operation.
- Digital Power Gating with Programmable Bulk Voltage Control
Programmable bulk voltage modulation reduces sub-threshold leakage while maintaining circuit state, eliminating latency from full power cycling.
- SRPG Switch Placement via Third Power Grid
A third power grid enables switch placement in dense flip-chip packages, reducing planar complexity and power consumption.