IC Configuration Context Switcher With Latch-Based Data Retiming

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Solution Overview

Problem

Configurable integrated circuits face complexity in efficiently retrieving, decoding, and synchronizing configuration data, leading to increased circuit complexity and power consumption, with existing solutions offering minimal performance gains in configuration setup time or resource usage.

Innovation Solution

The integration of a context switcher within the IC that switchably connects configurable circuits to different configuration data storage elements, utilizing re-timing stages, latches, or registers to decode and synchronize configuration data, allowing for efficient retrieval and supply of configuration data while minimizing circuit footprint and power usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If dual ported RAM is used to provide configuration data at odd and even cycles, then configuration data can be supplied continuously, but circuit complexity increases due to multiplexers and control logic

Engineering Contradiction:
Improveconfiguration data supply continuityVSAvoidcircuit complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The configuration data storage is segmented into multiple separate storage elements (first configuration data storage element and second configuration data storage element), each handling different phases of configuration data. This segmentation eliminates the need for complex multiplexing logic while maintaining continuous data supply through parallel access paths.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The sense amplifier and latch are merged into an integrated configuration data reading, decoding, and synchronizing circuit. This consolidation reduces the number of discrete components and interconnections, simplifying the overall circuit while maintaining the functionality of continuous configuration data supply.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If sense amplifiers and latches are used to capture and stabilize read data, then data stability is improved, but circuit complexity and power consumption increase

Engineering Contradiction:
Improvedata stabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The sense amplifier, decoder, and latch are merged into a single integrated circuit block that handles configuration data reading, decoding, and synchronizing operations. This consolidation maintains data stability through the latch function while reducing the overall circuit complexity by eliminating separate discrete components and their interconnections.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The integrated reading, decoding, and synchronizing circuit performs multiple functions (sensing, amplifying, decoding, and latching) within a single circuit block. This multi-functionality reduces the total component count and simplifies the circuit architecture while maintaining reliable data capture and stabilization.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Quantity of substance

If RAM cell size is reduced to increase density, then storage capacity is improved, but configuration setup time and performance may be compromised

Engineering Contradiction:
ImproveRAM cell densityVSAvoidconfiguration setup time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The configuration data storage is divided into multiple parallel storage elements that can be accessed simultaneously. This segmentation allows the system to maintain high density with smaller individual cells while compensating for potential speed losses through parallel access paths, reducing overall configuration setup time.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS7928761B2Configuration context switcher with a latch
Publication Date: 2011.04.19 ALTERA CORP
  • US7928761B2 patent drawing
  • US7928761B2 patent drawing
  • US7928761B2 patent drawing

AI summary

Some embodiments provide an IC with configuration context switchers. The IC includes several configurable circuits, each of which configurably performs one of several operations at any given time, based on the configuration data set that it receives at that time. The IC includes several storage circuits for storing several configuration data sets for each of the configurable circuits. The IC also includes a context switching interconnect circuit for switchably connecting the configurable circuit to different sets of storage circuits to receive different sets of configuration data sets. The context switcher includes one or more stages for re-timing the data coming from the configuration storage elements. The stages can include interconnect circuitry or storage circuitry. Some embodiments build one of the stages in the configuration data storage elements. Some embodiments encode the configuration data bits and hence utilize a decoder in the context switcher to decode the encoded configuration data.