SRPG Switch Placement via Third Power Grid
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Solution Overview
Problem
In dense integrated circuits, particularly in flip-chip package integrated circuits, the placement of switches connecting power grids for state retention power gating (SRPG) is challenging due to the positioning of power source pins above the semiconductor real estate, complicating the design and increasing power consumption during functional modes.
Innovation Solution
A method and electronic circuit design that includes a SRPG circuit connected to separate power grids via a switching circuit, allowing for flexible placement of switches by selectively connecting power grids, reducing the number of switches needed during state retention mode and simplifying the design by spreading power grids over large areas while placing the switching circuit in various locations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple switches are used to connect the gated power grid to the power source, then the SRPG flip-flop can be properly powered in functional mode, but the placement becomes very problematic in dense integrated circuits and especially in flip-chip package integrated circuits
Solution Approach 1:
The patent introduces a third power grid that operates in a different dimensional space (vertical stacking) to connect the gated and non-gated power grids. This allows switches to be placed in a third dimension rather than competing for the same planar real estate, resolving the placement complexity while maintaining reliable power delivery through the stacked configuration.
Solution Approach 2:
The patent implements a nested power grid structure where the gated power grid and non-gated power grid are connected through a third power grid via switches. This nested arrangement allows multiple power delivery paths to be integrated without increasing planar complexity, as each power grid is embedded within the larger power distribution network.
2Use of energy by moving object
If the gated power grid is used for functional mode, then power consumption is optimized for active operation, but the switch placement requirements increase device complexity
Solution Approach 1:
The patent segments the power delivery network into distinct gated and non-gated power grids, each optimized for specific operational modes. The gated power grid connects to the power source through switches controlled by a power gating signal, allowing independent optimization of power consumption for functional mode while reducing the impact on overall device complexity through modular segmentation.
3Ease of manufacture
If power source pins are positioned above the semiconductor real estate in flip-chip package integrated circuits, then packaging is simplified, but switch placement becomes very problematic
Solution Approach 1:
The patent resolves the conflict between simplified packaging and switch placement by introducing a third power grid that utilizes vertical stacking in the z-dimension. This allows power source pins to remain positioned above the semiconductor real estate for easy flip-chip packaging, while switches are placed in the third dimension through the stacked power grid structure, eliminating planar placement conflicts.
Data Source
AI summary
A method and a electronic circuit, the method includes: sending to a switching circuit, to a state retention power gating (SRPG) circuit and to a first power source a control signal indicating that the SRPG circuit should operate in a functional mode; coupling, by the switching circuit, a third power grid to a first power grid; supplying power from the first power source to the SRPG circuit via the first power grid, the switching circuit and the third power grid; supplying power from a second power source to a second circuit via a second power grid; sending to the switching circuit, to the SRPG circuit and to the first power source a control signal indicating that the SRPG circuit should operate in a state retention mode; coupling, by the switching circuit, the third power grid to the second power grid; supplying power from the second power source to the SRPG circuit via the second power grid, the switching circuit and the third power grid; supplying power from the second power source to the second circuit via the second power grid; and storing, by the SRPG state information.