High Integrity DMA Engine for Automotive Safety

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Solution Overview

Problem

Modern automotive electronic control units face challenges in implementing redundant hardware structures for direct memory access (DMA) due to power consumption limitations, which hinders high diagnostic fault coverage for safety-critical operations.

Innovation Solution

A method and system that enable DMA operations to switch into a high-integrity mode by assigning safety requestors to multiple DMA engines, comparing their outputs, and generating error messages if discrepancies are found, thereby ensuring redundant data processing and alerting users to application failures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If redundant hardware structures are implemented in DMA engines for safety-critical operations, then diagnostic fault coverage is improved, but power consumption increases

Engineering Contradiction:
Improvediagnostic fault coverageVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The system dynamically switches between single-engine and dual-engine modes based on safety requirements. The arbitration unit can assign safety-critical requestors to multiple DMA engines when needed, while non-critical requestors use a single engine, optimizing the balance between reliability and power consumption

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes operational parameters by enabling or disabling the second DMA engine based on the criticality of the requestor. This allows the system to adjust its redundancy level dynamically, consuming full power only when safety-critical operations require enhanced fault coverage

Inventive Principle:
Principle #35Parameter changes

2Reliability

If multiple DMA engines are used for safety requestors, then diagnostic fault coverage is improved, but device complexity increases

Engineering Contradiction:
Improvediagnostic fault coverageVSAvoidDMA engine configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Multiple DMA engines share common control structures, arbitration logic, and bus interfaces. The same arbitration unit manages both single-engine and dual-engine configurations, reducing overall system complexity despite having multiple engines available

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system uses identical copies of DMA engines for redundancy, where the second engine is a duplicate of the first. This standardized copying approach simplifies design and verification compared to implementing entirely different redundant structures

Inventive Principle:
Principle #26Copying

3Reliability

If output comparison between multiple DMA engines is implemented, then error detection capability is improved, but processing time increases

Engineering Contradiction:
Improveerror detection capabilityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The comparison operation runs continuously and concurrently with DMA operations rather than sequentially. The comparator unit operates in parallel with the DMA engines, eliminating additional processing time by performing comparison during the normal DMA execution flow

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

A dedicated comparator unit serves as an intermediary that receives outputs from multiple DMA engines and generates error signals. This specialized intermediary handles the comparison function efficiently, preventing it from becoming a time-critical path in the overall system

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9128838B2System and method of high integrity DMA operation
Publication Date: 2015.09.08 INFINEON TECHNOLOGIES AG
  • US9128838B2 patent drawing
  • US9128838B2 patent drawing
  • US9128838B2 patent drawing

AI summary

A system and method for direct memory access (DMA) operation provides for receiving DMA requestors, assigning the received DMA requestors to one or more of a plurality of DMA engines for processing the received DMA requestors, and if one of the received DMA requestors is a safety requestor, assigning the safety requestor to at least two DMA engines of the plurality of DMA engines for processing the safety requestor, disabling a bus interface for coupling at least one DMA engine of the at least two DMA engines to memories, comparing the outputs of the at least two DMA engines, and generating an error message if the comparison of the outputs of the at least two DMA engines are different from each other.