High-k Metal Gate Memory Cell Using BTI Threshold Shift
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Solution Overview
Problem
Conventional metal fuse and antifuse technologies for programming memory devices require high currents and voltages, limiting scalability and security, and are not reversible, making them inefficient and difficult to secure.
Innovation Solution
The use of high-k/metal gate logic transistors subjected to bias temperature instability (BTI) effects to program memory cells by creating traps in the high-k gate oxide, allowing for low-power, low-voltage programming and multiple levels of programming without physical changes, enabling secure and reversible memory storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional metal fuse and antifuse technologies are used for programming memory devices, then non-volatile storage is achieved, but high currents and voltages are required which limit scalability and increase power consumption
Solution Approach 1:
The patent changes the programming mechanism from high-current resistive blowing to low-power threshold voltage modulation through trap generation. By applying moderate voltage stress (below breakdown) over extended periods, the memory element transitions between programmed states through BTI-induced threshold voltage shifts, eliminating the need for high-power pulses while maintaining non-volatile storage reliability
Solution Approach 2:
The patent replaces the mechanical/physical destruction mechanism (fuse blowing, antifuse breakdown) with an electrical field effect mechanism (bias temperature instability causing threshold voltage shifts). This substitution allows programming through controlled electric field stress rather than destructive current flow, dramatically reducing power consumption while achieving the same non-volatile storage function
2Ease of manufacture
If conventional fuse and antifuse links are used, then programming is achieved, but the process is irreversible and security is compromised
Solution Approach 1:
The patent introduces dynamic reversibility to the programming process. The memory element can be programmed by applying positive voltage stress to generate traps and shift threshold voltage, then unprogrammed by applying negative voltage stress to remove traps and restore the original threshold voltage. This dynamic control enables multiple programming cycles and erasure, providing security through the ability to reconfigure or clear data as needed
3Use of energy by moving object
If high-k/metal gate transistors are used to exploit BTI effects, then low-power programming is achieved, but threshold voltage stability is affected by bias temperature instability
Solution Approach 1:
The patent converts the harmful BTI effect, which normally causes unwanted threshold voltage drift in high-k metal gate transistors, into a beneficial programming mechanism. By deliberately applying controlled voltage stress to induce BTI, the system generates stable threshold voltage shifts through trap formation that can be used to program memory states. The same physical effect that causes instability under normal operation becomes the foundation for reliable, low-power programming when controlled appropriately
4Productivity
If conventional bitcell programming is performed, then memory is programmed for a specific application, but the process requires large bitcell sizes and is difficult to scale
Solution Approach 1:
The patent changes the programming approach from destructive high-current events requiring large safety margins and robust structures to gradual threshold voltage modulation that can be implemented in standard high-k metal gate transistors. This parameter change enables programming in compact transistor structures without requiring oversized devices to handle high power, allowing bitcell scaling while maintaining programming efficiency
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces power consumption significantly, allows for small bitcell sizes, secure programming, and enables multiple reprogramming cycles with minimal degradation, improving memory device scalability and security.
Implementation Method 1
Techniques and circuitry are disclosed for implementing low power and low voltage non-volatile storage that exploit bias temperature instability (BTI) effects of high-k/metal-gate metal oxide semiconductor (MOS) transistors
Data Source
AI summary
Techniques and circuitry are disclosed for implementing non-volatile storage that exploit bias temperature instability (BTI) effects of high-k/metal-gate n-type or p-type metal oxide semiconductor (NMOS or PMOS) transistors. A programmed bitcell of, for example, a memory or programmable logic circuit exhibits a threshold voltage shift resulting from an applied programming bias used to program bitcells. In some cases, applying a first programming bias causes the device to have a first state, and applying a second programming bias causes the device to have a second state that is different than the first state. Programmed bitcells can be erased by applying an opposite polarity stress, and re-programmed through multiple cycles. The bitcell configuration can be used in conjunction with column/row select circuitry and/or readout circuitry, in accordance with some embodiments.