High-K Transistor Annealing with Negative Bias
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Solution Overview
Problem
High-k dielectrics on silicon-based channels in field effect transistors result in undesirably high threshold voltage due to the formation of oxygen vacancies during anneal, leading to increased gate leakage current and power consumption.
Innovation Solution
Applying a negative electrical bias to the gate electrode during an anneal process above 350°C to inhibit the formation of oxygen vacancies in high-k dielectric layers, thereby reducing the energy gain for electron transfer and decreasing the density of oxygen vacancies, which in turn reduces the threshold voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If high-k dielectric materials are used in gate stacks, then gate leakage current is reduced, but threshold voltage becomes too high
Solution Approach 1:
The patent applies a negative electrical bias parameter during the annealing process to change the electrical state of the gate stack. This parameter change inhibits oxygen vacancy formation and reduces the positive charge density in the high-k dielectric, thereby adjusting the threshold voltage to an acceptable range while maintaining low gate leakage current
Solution Approach 2:
The negative bias is applied during the annealing process before the device is fully operational. This preliminary action prevents the formation of oxygen vacancies and excessive positive charge accumulation in the high-k dielectric layer, ensuring optimal electrical characteristics are established before the transistor begins normal operation
2Reliability
If anneal temperature is increased above 350°C, then oxygen vacancy formation is inhibited, but process complexity increases
Solution Approach 1:
The patent introduces an electrical bias parameter to the annealing process, transforming it from a purely thermal process to a combined thermal-electrical process. This additional parameter enables better control over oxygen vacancy formation, improving reliability while the increased temperature provides the thermal energy needed for effective vacancy suppression
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively reduces the density of oxygen vacancies and the resulting positive charge in high-k dielectric layers, leading to a less negative threshold voltage and improved performance in p-channel FETs by minimizing gate leakage current and power consumption.
Implementation Method 1
a negative electrical bias is formed across one or more gate stacks of the wafer
Implementation Method 2
when the wafer is annealed
Implementation Method 3
decreasing the density of oxygen vacancies
Data Source
AI summary
An apparatus includes a wafer annealing tool and a plurality of electrodes coupled to the wafer annealing tool, wherein the electrodes are configured to be in physical contact with a wafer so that, when the wafer is annealed, a negative electrical bias is formed across one or more gate stacks of the wafer.