High-Side Circuit Isolation Layout for Multi-Voltage HVICs
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Solution Overview
Problem
Conventional semiconductor devices with high-voltage integrated circuits (HVICs) face challenges in accommodating multiple high-side circuits operating at different power supply voltages within the high-side circuit region without increasing the device size.
Innovation Solution
The semiconductor device incorporates a high-side circuit region with first and second high-side circuit regions, each operating at distinct power supply voltages, and utilizes a second isolation region to electrically isolate these circuits, allowing for miniaturization without compromising performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple high-side circuits operating at different power supply voltages are provided in the high-side circuit region, then the device functionality and versatility are improved, but the device size increases
Solution Approach 1:
The high-side circuit region is divided into multiple isolated regions (first high-side circuit region, second high-side circuit region, etc.) using isolation regions. Each region can independently host high-side circuits operating at different power supply voltages. This segmentation allows multiple circuits with different voltage requirements to coexist in a compact area without electrical interference, resolving the contradiction between versatility and device size.
2Reliability
If high breakdown voltage termination structure and level shift circuit are electrically isolated by trench isolation, then the breakdown voltage performance is improved, but the manufacturing complexity increases
Solution Approach 1:
The patent combines multiple isolation functions into a single integrated isolation structure. The isolation regions serve both to electrically isolate the high breakdown voltage termination structure from the level shift circuit AND to separate multiple high-side circuit regions operating at different voltages. This merging of isolation functions maintains high breakdown voltage performance while reducing manufacturing complexity compared to implementing separate isolation structures for each function.
Data Source
AI summary
In a semiconductor device, a first N-type diffusion layer is provided in a first high-side circuit region, and a second N-type diffusion layer is provided in a second high-side circuit region. Constituent elements for first and second high-side circuits are provided in the first and second N-type diffusion layers. An isolation trench is provided between the first N-type diffusion layer and the second N-type diffusion layer. The deepest portion of the isolation trench reaches a P-type substrate region of a P-type substrate. The first N-type diffusion layer and the second N-type diffusion layer are electrically isolated by the isolation trench having a buried insulating film inside.


