Horizontal Capacitor Layout for Uniform IC Capacitance

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Solution Overview

Problem

Existing capacitor designs in integrated circuits face challenges in achieving uniform capacitance due to uneven insulating layers, leading to excessive capacitance variation, which can be mitigated by using a horizontally-oriented capacitor with a thin insulating layer to maintain small IC chip sizes while ensuring capacitance uniformity.

Innovation Solution

A method of fabricating a semiconductor device that includes forming a dummy structure over a substrate, creating spacers, and using a continuous poly on oxide definition edge (CPODE) pattern to form a trench filled with dielectric material, allowing for the creation of a horizontally-oriented capacitor with conductive features from source/drain electrodes of adjacent transistors, thereby achieving uniform capacitance and reduced area occupancy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If a vertically-oriented capacitor is used with shrinking design rules, then the capacitor dimensions decrease, but the capacitance value decreases

Engineering Contradiction:
Improvecapacitor areaVSAvoidcapacitance value
Core Design Contradiction:
Area of stationary objectVSQuantity of substance

Solution Approach 1:

The patent transitions from a vertically-oriented capacitor structure to a horizontally-oriented capacitor structure. This dimensional change allows the capacitor to maintain larger effective area and capacitance value even as overall device dimensions shrink due to scaling rules, thereby resolving the contradiction between reduced area and maintained capacitance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If a thin dielectric material is used to achieve high capacitance, then the capacitance increases, but the insulating layer becomes non-uniform causing excessive capacitance variation

Engineering Contradiction:
ImprovecapacitanceVSAvoidinsulating layer uniformity
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

By orienting the capacitor horizontally rather than vertically, the patent enables the use of thin dielectric material while maintaining uniformity. The horizontal orientation allows better control and uniformity in the insulating layer formation process, reducing capacitance variation while still achieving high capacitance through the thin dielectric.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Manufacturing precision

If a horizontally-oriented capacitor with thin insulating layer is used, then capacitance uniformity improves, but additional processing steps are required

Engineering Contradiction:
Improvecapacitance uniformityVSAvoidprocessing steps
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent integrates the capacitor formation process with the existing transistor fabrication process. By merging these processes, the horizontally-oriented capacitor can be formed with improved uniformity while minimizing additional processing steps, as the capacitor structures are created using the same process sequence as the transistors.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11864376B2Semiconductor device including insulating element and method of making
Publication Date: 2024.01.02 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11864376B2 patent drawing
  • US11864376B2 patent drawing
  • US11864376B2 patent drawing

AI summary

A method of making a semiconductor device includes forming a first transistor on a substrate, wherein forming the first transistor comprises forming a first source/drain electrode in the substrate. The method further includes forming a second transistor on the substrate, wherein forming the second transistor comprises forming a second source/drain electrode. The method further includes forming an insulating layer extending into the substrate, wherein the insulating layer directly contacts the first source/drain electrode and the second source/drain electrode, a top surface of the insulating layer is above a top surface of the substrate.