Host Low Power Clock Frequency Dynamic Adjustment

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Solution Overview

Problem

Existing MIPI host devices face low power link failures due to variations between a peripheral's published and actual low power clock frequencies, and static adjustments are not suitable for all peripherals, leading to unusable peripherals.

Innovation Solution

A system and method for dynamically adjusting the low power clock frequency of a host device by using a low power adjust module to determine a valid frequency range and adjust the host clock without relying on the peripheral's clock frequency, ensuring the host-peripheral link remains operational.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If static adjustment of host low power clock frequency is used for a given peripheral, then the link is stable for that specific peripheral, but the adjustment is not suitable for other peripherals with different clock frequencies

Engineering Contradiction:
Improvelink stabilityVSAvoidcompatibility with different peripherals
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic adjustment of the host low power clock frequency by continuously monitoring the peripheral's actual clock frequency and adjusting the host clock accordingly. This allows the system to adapt to different peripherals in real-time, resolving the contradiction between link stability for a specific peripheral and compatibility with different peripherals.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent uses feedback mechanisms where the host device monitors the peripheral's actual low power clock frequency and adjusts its own clock frequency based on this feedback. This closed-loop control ensures both link stability and adaptability to different peripherals by continuously optimizing the clock synchronization.

Inventive Principle:
Principle #23Feedback

2Ease of manufacture

If the host low power clock frequency is adjusted using published peripheral clock frequency, then the adjustment is simple, but variations between published and actual frequencies lead to link failure

Engineering Contradiction:
Improveadjustment simplicityVSAvoidlink operational status
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent performs preliminary measurements of the peripheral's actual low power clock frequency before establishing the host-peripheral link. By measuring the actual frequency in advance and using this measured value for adjustment, the system avoids link failure caused by variations between published and actual frequencies, while maintaining adjustment simplicity.

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If the host low power clock frequency is dynamically adjusted, then compatibility with various peripherals is improved, but the system complexity increases

Engineering Contradiction:
Improvecompatibility with various peripheralsVSAvoidadjustment system complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements self-service mechanisms where the host device automatically measures the peripheral's clock frequency and adjusts its own clock without external intervention. This automation reduces the perceived complexity for users while maintaining high adaptability to different peripherals.

Inventive Principle:
Principle #25Self-service

Data Source

PatentEP3073349B1System and method for dynamically adjusting host low power clock frequency
Publication Date: 2019.01.02 WIPRO LTD
  • EP3073349B1 patent drawingFigure 1~3
  • EP3073349B1 patent drawingFigure 4~5
  • EP3073349B1 patent drawingFigure 6~7

AI summary

This disclosure relates generally to a host-peripheral interface, and more particularly to a system and method for dynamically adjusting a low power clock frequency of a host device upon detecting coupling of a peripheral device to the host device. In one embodiment, a method is provided for dynamically adjusting a low power clock frequency of a host device. The method comprises dynamically determining an initial frequency of a low power clock of the host device at which a low power link between the host device and a peripheral device is operational, computing a low power clock frequency range of the host device based on the initial frequency of the low power clock, assessing the low power link in the low power clock frequency range, and adjusting the low power clock frequency to a typical frequency of the low power clock frequency range based on the assessment.