High Voltage Capacitor in Die Using Thick Intermediate Metal Layer
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Solution Overview
Problem
High voltage power management integrated circuits (PMICs) face challenges in transmitting control signals across high voltage isolation, where direct links are not feasible, and existing capacitive solutions require expensive and bulky off-chip high voltage capacitors.
Innovation Solution
A die design incorporating a high voltage capacitor with a thick intermediate metal layer and a redistribution layer, where the intermediate metal layer conductor is made of Copper and configured to supply power to a group of transistors, while a first conductor supplies power to a sub-group, forming a high voltage capacitor without modifying existing manufacturing processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an off-chip high voltage capacitor is used, then the die can transmit control signals across high voltage isolation, but the solution becomes expensive and bulky
Solution Approach 1:
The patent merges the high voltage capacitor function with existing on-chip metal layers and dielectric materials. The thick intermediate metal layer serves dual purposes: as a power supply layer for transistors and as one electrode of the high voltage capacitor. The dielectric material between metal layers serves both as insulation for power distribution and as the capacitor dielectric. This integration eliminates the need for separate off-chip capacitors while maintaining high voltage isolation functionality.
Solution Approach 2:
The intermediate metal layer and dielectric materials are designed to perform multiple functions simultaneously. The thick intermediate metal layer provides both power distribution to transistor groups and serves as a capacitor electrode. The dielectric materials between metal layers provide both electrical insulation for power management and serve as the capacitor dielectric layer. This multi-functionality reduces component count and eliminates the need for bulky off-chip capacitors.
2Reliability
If an off-chip high voltage capacitor is used, then the die can transmit control signals across high voltage isolation, but the cost increases
Solution Approach 1:
The patent combines the high voltage capacitor functionality with standard CMOS process layers. The capacitor electrodes are formed using existing metal layers (intermediate metal layer and redistribution layer), and the dielectric is formed using standard dielectric materials deposited during normal fabrication. This approach leverages existing process capabilities without requiring additional expensive equipment or materials, thereby reducing manufacturing costs while achieving reliable high voltage isolation.
Solution Approach 2:
The standard CMOS manufacturing process itself provides the necessary structures for the high voltage capacitor. The thick intermediate metal layer and dielectric layers are formed as part of the normal power distribution network fabrication. No separate capacitor fabrication process is needed - the existing process structures are repurposed to serve as capacitor components, making the solution cost-effective by utilizing self-service capabilities of the manufacturing process.
3Use of energy by moving object
If a thick intermediate metal layer is used for power supply, then power consumption is reduced, but the layer thickness exceeds typical design rules
Solution Approach 1:
The patent changes the thickness parameter of the intermediate metal layer from typical thin layers to a thick layer (30000 Angstrom or more). This parameter change is specifically made to reduce resistance and improve power distribution efficiency to transistor groups. The thick layer provides lower resistance paths for power delivery, reducing I²R losses and improving overall power consumption characteristics. This parameter change is accommodated within the manufacturing process capabilities.
Solution Approach 2:
The thick intermediate metal layer is implemented specifically in regions where high current density is required for power distribution to power-hungry transistor groups. The thickness is optimized locally based on power consumption requirements of different circuit regions. This localized approach allows the metal layer to be thick where needed for low resistance power delivery, while maintaining standard thickness elsewhere, balancing manufacturing precision with power efficiency requirements.
4Power
If the intermediate metal layer thickness is increased, then power distribution efficiency improves, but the layer thickness is independent of capacitor electrical parameters
Solution Approach 1:
The patent segments the metal layer system into multiple layers with different functions. The intermediate metal layer is dedicated to power distribution with its thickness optimized for low resistance based on power consumption requirements. The capacitor function is achieved by utilizing the dielectric material between this thick power distribution layer and the redistribution layer. This segmentation allows independent optimization of power distribution (thick intermediate layer) and capacitor performance (dielectric thickness and area), decoupling these two functions while improving overall system efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution allows for efficient power transmission across high voltage isolation with reduced power consumption and area overhead, improving power switching efficiency and enabling the die to withstand high voltages without the need for costly, bulky components.
Implementation Method 1
at least the certain portion of the intermediate metal layer dielectric material, the first capacitor conductive plate and the second capacitor conductive plate form a high voltage capacitor
Implementation Method 2
an intermediate metal layer dielectric material that may partially surround the intermediate metal layer conductor
Data Source
AI summary
According to an embodiment of the invention there may be provided a die that may include a first capacitor layer that comprises (a) a first capacitor conductive plate, and (b) a first capacitor layer dielectric material that partially surrounds the first capacitor conductive plate; a first conductor; an intermediate metal layer that comprises (a) an intermediate metal layer conductor that is made of Copper, and (b) an intermediate metal layer dielectric material that partially surrounds the intermediate metal layer conductor; wherein the first conductor is positioned between a substrate of the die and the intermediate metal layer; a redistribution layer that comprises (a) a redistribution layer conductor that is electrically coupled to an interface pad of the die, (b) a second capacitor conductive plate, and (c) a redistribution layer dielectric material that partially surrounds the redistribution layer conductor and the second capacitor conductive plate; wherein a certain portion of the intermediate metal layer dielectric material is positioned between the first and second capacitor conductive plates; wherein at least the certain portion of the intermediate metal layer dielectric material, the first capacitor conductive plate and the second capacitor conductive plate form a high voltage capacitor; and wherein the intermediate metal layer conductor is configured to supply power to a group of transistors of the die while the first conductor is configured to supply power only to a sub-group of the transistors of the die.