HV Diode Leakage Control via Local N-well Doping
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Solution Overview
Problem
Ultra-high voltage semiconductor devices with parasitic PNP transistors face challenges in controlling leakage currents due to low doping concentrations in high-voltage N-wells, leading to increased current gain and leakage issues, especially under high temperature conditions.
Innovation Solution
A semiconductor device structure is implemented with a high-voltage N-well having a higher doping concentration than the surrounding N-well, and a bulk P-well adjacent to the edge of the high-voltage N-well, along with a high-voltage diode P-well and N-well configuration, which reduces the current gain of parasitic PNP transistors by increasing the doping concentration of the N-well between the bulk and diode P-wells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the doping concentration of the high-voltage N-well is kept low to maintain high-voltage breakdown characteristics, then the breakdown voltage is improved, but the current gain of parasitic PNP transistors increases leading to higher leakage currents
Solution Approach 1:
The patent introduces an N-well with higher doping concentration specifically in the region between the bulk P-well and the high-voltage diode P-well, while maintaining the overall low doping concentration of the high-voltage N-well. This local modification reduces the current gain of parasitic PNP transistors in this specific region without compromising the high breakdown voltage characteristics of the entire high-voltage N-well structure.
Solution Approach 2:
The patent changes the doping concentration parameter locally by introducing an N-well with higher doping concentration (1E16 to 1E18 atoms/cm³) compared to the high-voltage N-well (1E14 to 1E16 atoms/cm³). This parameter change in the base region of the parasitic PNP transistor reduces its current gain and suppresses leakage currents while maintaining the high breakdown voltage of the overall device.
2Object-generated harmful factors
If the doping concentration of the N-well between bulk P-well and diode P-well is increased to reduce parasitic PNP current gain, then leakage current is reduced, but the device complexity increases
Solution Approach 1:
The patent merges the N-well structure with the existing high-voltage N-well to form a multi-layered well structure. The N-well is integrated into the same vertical column as the high-voltage N-well, creating a nested configuration where the N-well serves as an intermediate layer between the bulk P-well and the high-voltage N-well. This merging approach reduces leakage current while minimizing additional structural complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration significantly reduces leakage currents and maintains low current gain even at high temperatures, enhancing the reliability and operational life of ultra-high voltage semiconductor devices.
Implementation Method 1
A doping concentration of the N-well is higher than a doping concentration of the HVNW
Data Source
AI summary
A semiconductor device includes a substrate, a high-voltage N-well (HVNW) disposed in the substrate, a bulk P-well disposed in the substrate and adjacent to an edge of the HVNW, a high-voltage (HV) diode disposed in the HVNW, the HV diode including a HV diode P-well disposed in the HVNW and spaced apart from the edge of the HVNW, and an N-well disposed in the HVNW and between the HV diode P-well and the bulk P-well. A doping concentration of the N-well is higher than a doping concentration of the HVNW.