HV-LDMOS Transistor Gate Isolation for Breakdown Voltage
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Solution Overview
Problem
Conventional high voltage lateral double-diffused metal-oxide-semiconductor (HV-LDMOS) transistor devices face a trade-off between achieving high breakdown voltage and low ON-resistance (RON), with existing designs struggling to optimize both parameters simultaneously.
Innovation Solution
The introduction of alternately arranged drift regions and isolation structures under the gate, where the isolation structures are overlapped by the gate, effectively reduces the electric field and enhances breakdown voltage without increasing RON.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the drift region is designed with low dope concentration and large area to achieve high breakdown voltage, then the breakdown voltage is improved, but the ON-resistance increases
Solution Approach 1:
The drift region is segmented into multiple alternating drift regions and isolation structures, creating a multi-section configuration under the gate. This segmentation allows the drift region to be divided into functional zones that can independently optimize for both high breakdown voltage and low ON-resistance, resolving the trade-off between these two parameters.
Solution Approach 2:
Different regions under the gate are assigned different properties: drift regions provide low resistance conduction paths while isolation structures provide high voltage isolation. This local differentiation allows each zone to perform its specialized function optimally, achieving both high breakdown voltage and low ON-resistance simultaneously.
2Reliability
If isolation structures are introduced under the gate to reduce electric field and enhance breakdown voltage, then the breakdown voltage is improved, but the device complexity increases
Solution Approach 1:
The isolation structures are merged with the drift region formation process, where both are created through integrated fabrication steps. The alternating pattern of drift regions and isolation structures is formed in a unified manner, reducing the need for separate processing stages and minimizing the increase in device complexity.
Solution Approach 2:
The isolation structures serve multiple functions: they provide electrical isolation between adjacent devices, reduce electric field concentration to enhance breakdown voltage, and define the lateral boundaries of the drift region. This multi-functionality justifies the added structural elements by delivering multiple benefits from a single design feature.
Data Source
AI summary
A high voltage metal-oxide-semiconductor transistor device includes a substrate, a gate formed on the substrate, a source region and a drain region formed in the substrate at respective sides of the gate, and a first isolation structure formed under the gate. The first isolation structure is overlapped by the entire gate.