HV-LDMOS Transistor Layout with Segmented Drift Region
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Solution Overview
Problem
Conventional high voltage lateral double-diffused metal-oxide-semiconductor (HV-LDMOS) transistor devices face a trade-off between achieving high breakdown voltage and low ON-resistance (RON), as these parameters are conflicting and difficult to optimize simultaneously.
Innovation Solution
The layout pattern of a HV MOS transistor device includes a non-continuous doped region with alternating gaps and doped regions of complementary conductivity types, which reduces the total doped area and provides an easy pathway for electrons, thereby increasing breakdown voltage while decreasing RON.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a continuous doped drift region is used to increase breakdown voltage, then breakdown voltage is improved, but ON-resistance increases due to larger doped area
Solution Approach 1:
The drift region is segmented into alternating doped regions and undoped gaps, creating a non-continuous structure. This segmentation allows the doped portions to provide high voltage breakdown capability while the undoped gaps reduce the total doped area, thereby lowering ON-resistance. The drift region is divided into multiple segments that collectively achieve both high breakdown voltage and low resistance.
Solution Approach 2:
Different regions of the drift structure are assigned different doping qualities - doped regions provide high electric field withstand capability for breakdown voltage, while undoped gap regions provide low resistance pathways for current flow. This local differentiation of doping quality allows simultaneous optimization of both breakdown voltage and ON-resistance characteristics.
2Loss of energy
If doped region area is reduced to decrease ON-resistance, then ON-resistance is improved, but breakdown voltage decreases
Solution Approach 1:
By segmenting the drift region into doped and undoped sections, the patent achieves reduced total doped area (lowering ON-resistance) while maintaining adequate doped regions spaced throughout to provide high voltage breakdown capability. The segmented structure prevents the trade-off between area reduction and breakdown voltage loss.
Solution Approach 2:
The patent transitions from a uniform two-dimensional doped region to a structured pattern with spatial dimensionality, incorporating periodic undoped gaps within the drift region. This dimensional restructuring allows the doped portions to be more efficiently distributed, providing both low resistance pathways and high voltage withstand capability simultaneously.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively enhances breakdown voltage while reducing ON-resistance, achieving the goal of high breakdown voltage and low RON simultaneously.
Implementation Method 1
the fourth doped regions formed in the gaps serve as an easy pathway for the passing electrons
Implementation Method 2
the non-continuous doped region is rendered to improve the breakdown voltage of the HV MOS transistor device
Data Source
AI summary
A layout pattern of a high voltage metal-oxide-semiconductor transistor device includes a first doped region having a first conductivity type, a second doped region having the first conductivity type, and an non-continuous doped region formed in between the first doped region and the second doped region. The non-continuous doped region further includes a plurality of third doped regions, a plurality of gaps, and a plurality of fourth doped regions. The gaps and the third doped regions s are alternately arranged, and the fourth doped regions are formed in the gaps. The third doped regions include a second conductivity type complementary to the first conductivity type, and the fourth doped regions include the first conductivity type.