Self-Aligned Gate Oxide Formation for HVMOS Reliability
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Solution Overview
Problem
High-voltage metal-oxide-semiconductor (HVMOS) devices face issues with gate oxide corner thinning and time-dependent dielectric breakdown (TDDB) reliability due to the existing methods of forming HVMOS devices.
Innovation Solution
A method involving a substrate with a shallow trench isolation region, where a hard mask is used to form an opening and recess the active area silicon portion to create a silicon spacer, followed by oxidation to form a gate oxide layer with varying thicknesses, allowing for a self-aligned gate oxide formation without additional thermal budget or photomask changes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional methods are used to form HVMOS devices, then device fabrication can proceed with standard processes, but gate oxide corner thinning and TDDB reliability issues occur
Solution Approach 1:
The method performs preliminary actions by forming the silicon spacer before oxide growth, using the spacer as a template to ensure uniform gate oxide thickness at critical corner regions. This preliminary structuring prevents the corner thinning problem that would otherwise occur during subsequent oxidation processes.
Solution Approach 2:
The silicon spacer acts as an intermediary element between the STI region and the gate oxide formation process. It provides a controlled interface that ensures uniform oxide growth and prevents direct exposure of corner regions to oxidation, thereby eliminating gate oxide corner thinning while maintaining TDDB reliability.
2Manufacturing precision
If additional photomasks or thermal budget are used to solve gate oxide corner thinning, then gate oxide uniformity can be improved, but process complexity and manufacturing cost increase
Solution Approach 1:
The method employs self-aligned fabrication where the silicon spacer automatically positions itself relative to the STI region without requiring additional photomasks or alignment steps. The spacer serves its own function as both a structural element and a oxidation barrier, eliminating the need for complex additional processing steps.
Solution Approach 2:
The invention merges multiple functions into the silicon spacer structure: it serves as both a physical spacer defining the gate region and as an oxidation barrier protecting corner regions. This consolidation eliminates the need for separate process steps or additional materials that would increase fabrication complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively addresses gate oxide corner thinning and TDDB issues while being compatible with current MOS processes, enhancing the reliability of HVMOS devices for medium-voltage or high-voltage applications.
Implementation Method 1
An oxidation process is performed to oxidize the AA silicon portion and the silicon spacer to form a gate oxide layer
Data Source
AI summary
A method of fabricating a MOS device is disclosed. A substrate having an active area (AA) silicon portion and shallow trench isolation (STI) region surrounding the active area is provided. A hard mask is formed on the substrate. A portion of the hard mask is removed to form an opening on the AA silicon portion. The opening exposes an edge of the STI region. The AA silicon portion is recessed through the opening to a predetermined depth to form a silicon spacer along a sidewall of the STI region in a self-aligned manner. An oxidation process is performed to oxidize the AA silicon portion and the silicon spacer to form a gate oxide layer.