HVPMOS Charge Pump Bulk Switching for On-Resistance Reduction
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Solution Overview
Problem
Existing charge pump circuits face issues with high on-resistance and charge current losses due to dynamic currents flowing through the drain-to-substrate and source-to-substrate of main switches, and current flow through bulk switches, which affect charge transfer efficiency.
Innovation Solution
A charge pump design utilizing a single HVPMOS transistor as the main switch with extended drain and synchronously switching the bulk to the higher voltage node, coupled with bulk switches formed by series-connected minimum-sized HVPMOS transistors to eliminate current flow through bulk switches and reduce on-resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If two transistors are used in series to alleviate body effect, then charge transfer efficiency is improved, but on-resistance increases and charge current losses occur
Solution Approach 1:
The bulk connection is segmented into two separate bulk switches: a first bulk switch connecting the bulk to the source, and a second bulk switch connecting the bulk to the drain. This segmentation allows independent control of bulk voltage relative to source and drain, enabling the bulk to be maintained at a higher potential than both without requiring series transistor configurations that increase on-resistance.
Solution Approach 2:
The bulk switches are dynamically controlled to switch the bulk connection synchronously with the main switch operation. During the charge transfer phase, the bulk is connected to the higher voltage node (source or drain) to maintain proper voltage relationships and prevent body effect, while during other phases the connections are adjusted accordingly. This dynamic control achieves body effect mitigation without the static drawbacks of series transistor configurations.
2Reliability
If the bulk is connected to the source to prevent parasitic bipolar turn-on, then reliability is improved, but dynamic currents flow through drain-to-substrate and source-to-substrate
Solution Approach 1:
The bulk connection is dynamically switched between source and drain based on the operational phase. During charge transfer, the bulk is connected to the higher voltage node to prevent parasitic bipolar turn-on. The synchronous switching ensures that the bulk maintains proper voltage relationships with both source and drain at different times, eliminating continuous dynamic current paths while maintaining reliability.
Solution Approach 2:
The bulk is pre-connected to the higher voltage node before charge transfer occurs, ensuring that the voltage relationship preventing parasitic bipolar turn-on is established in advance. This preliminary action maintains proper voltage gradients throughout the operation, preventing harmful dynamic currents from developing.
3Reliability
If current flows through bulk switches to control body effect, then threshold voltage stability is improved, but charge current losses increase
Solution Approach 1:
The harmful current flow through bulk switches is extracted and eliminated by using minimum-sized transistors configured as switches rather than current-carrying elements. The bulk switches are designed to conduct voltage rather than significant current, separating the function of threshold voltage control from charge current transport. This extraction of the harmful current path maintains threshold voltage stability without the associated energy losses.
Data Source
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AI summary
An integrated circuit for a charge pump with a charge stage and a pump stage and a single High-Voltage PMOS (HVPMOS) transistor as the main switch for each stage and two times two minimum HVPMOS transistors in series as a bulk switch with fixed bulk connections, where the minimum HVPMOS transistors are smaller sized transistors than the transistors of the main switch. The bulk of the main switch is switched synchronously to the voltage node of the HVPMOS transistor of the main switch to force the bulk voltage (VB) to be equal or larger than either the source voltage (VS) or the drain voltage (VD). Two non-overlapping clock signals are used to trigger the HVPMOS transistors of the charge and pump stage.